Network


Latest external collaboration on country level. Dive into details by clicking on the dots.

Hotspot


Dive into the research topics where Davy H. Choi is active.

Publication


Featured researches published by Davy H. Choi.


IEEE Journal of Solid-state Circuits | 1999

Design considerations and implementation of a programmable high-frequency continuous-time filter and variable-gain amplifier in submicrometer CMOS

Venu Gopinathan; Maurice Tarsia; Davy H. Choi

We report on an approach to designing high-speed, low-voltage programmable continuous-time filters with an embedded variable-gain amplifier (VGA). The methods we describe here are aimed at implementation in ultra-short-channel, low-voltage CMOS technologies. The seventh-order equiripple filter and VGA combination described here has a -3-dB frequency programmable from 30 to 100 MHz, gain programmable from 0 to 17 dB and 12 dB of boost.


international solid-state circuits conference | 1994

An analog front-end signal processor for a 64 Mb/s PRML hard-disk drive channel

Davy H. Choi; Richard C. Pierson; Fredrick W. Trafton; Benjamin Sheahan; Venugopal Gopinathan; Glenn Mayfield; Indumini Ranmuthu; Srinivasan Venkatraman; Vivek Pawar; Owen Lee; William H. Giolma; William R. Krenik; W. Abbott; K. Johnson

Synchronous channel designs, such as partial response maximum likelihood (PRML), are viable for high areal density on a hard-disk drive (HDD). Previously-published PRML channels include a 56 Mb/s channel design but without an on-chip programmable filter, synthesizer or servo demodulator. This 5V BiCMOS integrated circuit contains all the analog front-end functions necessary for a 64Mb/s HDD channel using a rate-8/9 code.<<ETX>>


international solid state circuits conference | 1994

An analog front-end signal processor for a 64 Mbits/s PRML hard-disk drive channel

Davy H. Choi; Richard C. Pierson; Fredrick W. Trafton; Benjamin Sheahan; Venugopal Gopinathan; Glenn Mayfield; Indumini Ranmuthu; Srinivasan Venkatraman; Vivek Pawar; Owen Lee; William H. Giolma; William R. Krenik; William L. Abbott; Kenneth E. Johnson

This BiCMOS IC contains all the analog front-end components necessary for the design of a 21-64 Mb/s HDD channel. Major functional blocks include an automatic gain control circuit having both analog and digital modes of operation, a programmable filter with 6-33 MHz bandwidth range, two phase-locked loops with 24-72 MHz center frequency ranges, a differential 6 bit flash A/D converter with 24-72 MHz sampling rates, and a write precompensator having 600 ps step size. >


Analog Integrated Circuits and Signal Processing | 1998

S/N Optimized, Programmable 1–10 MHz Bandwidth and 0–20 dB Gain, Precision I-Q Communication Channel for Digital Video Applications

Adam Wyszynski; Patrick P. Siniscalchi; Davy H. Choi

An analog part of a digital-video quadrature demodulation scheme is built using a 7 GHz, 0.8 μm biCMOS process. The scheme provides for 1–10 MHz cutoff frequency and 0–20 dB gain controls and dissipates 250 mW from a power supply of 5 V. The channel filtering is realized by two identical 4th Order Butterworth lowpass filters built with the gm-C technique. They are equipped with cutoff programming and in-package trim tuning for cutoff adjustment. A programmable gain amplifier is placed in front of each filter for better joint noise and intermodulation performance. Such an arrangement allows to operate the filter at a maximum signal level improving the worst-case channel S/N by 6.5 dB. For the in-band components the worst case S/N is better than 41 dB, whereas THD and IMD are less than −48 dB. This single-ended channel achieves PSRR of 42 dB.


Archive | 1997

Error estimation circuit and method for providing a read channel error signal

Kerry C. Glover; Davy H. Choi; Mark Wolfe; Glenn Mayfield; Jefferson W. Gamble


Archive | 1998

Method and apparatus for reducing asymmetry in a signal from a magneto-resistive read head

Bryan E. Bloodworth; Davy H. Choi; Patrick P. Siniscalchi; Geert A. De Veirman


Archive | 2000

Temperature and process independent exponential voltage-to-current converter circuit

Bryan E. Bloodworth; Davy H. Choi; Mehedi Hassan


Archive | 1995

Logic gate with matched output rise and fall times and method of construction

Davy H. Choi; Venugopal Gopinathan


Archive | 2002

System and method for improving frequency response in a magneto-resistive preamplifier

Davy H. Choi


Archive | 1995

Delay circuit for a write data precompensator system

Davy H. Choi; William H. Giolma; Owen Lee

Collaboration


Dive into the Davy H. Choi's collaboration.

Top Co-Authors

Avatar
Top Co-Authors

Avatar
Top Co-Authors

Avatar
Top Co-Authors

Avatar
Top Co-Authors

Avatar
Top Co-Authors

Avatar
Top Co-Authors

Avatar
Top Co-Authors

Avatar
Top Co-Authors

Avatar
Top Co-Authors

Avatar
Researchain Logo
Decentralizing Knowledge