E. Hackbarth

Junction degradation in bipolar transistors and the reliability imposed constraints to scaling and design

The stress-induced leakage current is predominantly a Shockley-Read-Hall-like generation-recombination current. As the stress progresses, the leakage current increases, eventually reaches a maximum and then decays. The leakage current lowers the current gain at low biases. It affects the narrow-emitter transistors more since it is proportional to the emitter edge length. But, its impact is less significant if the transistor is operated at a high V/sub be/, as required by constant-current scaling. The loss of the current gain does not affect the circuit speed directly. Instead, it reduces the logic swing and thus the noise margin of the circuit. The design to absorb the degradation with a larger initial logic swing results in a speed penalty. The reverse-stress-induced junction degradation can be eliminated by properly designing the circuit There is no concern for emitter-coupled logic (ECL) circuits when the logic swing is less than the V/sub be/ of the transistors. >

Identification and implication of a perimeter tunneling current component in advanced self-aligned bipolar transistors

The identification of a perimeter tunneling current in the base-emitter junction of advanced double-poly self-aligned bipolar transistors has been verified by measuring based current as a function of temperature, bias voltage, and device perimeter-to-area ratio. The perimeter tunneling current at forward bias is found to be predominantly an excess tunneling that depends on the sidewall oxide interface properties, while that at reverse bias is due to band-to-band tunneling resulting from the emitter and extrinsic base profile overlap. Based on experimental results and an analysis of base-leakage-current trade-offs at forward and reverse bias, a device design concept was developed to enhance device performance and processing yield in scaled bipolar transistors. >

Inherent and stress-induced leakage in heavily doped silicon junctions

Inherent leakage currents and leakage induced with reverse-bias stress are investigated in heavily doped emitter-base junctions of polysilicon self-aligned bipolar transistors and similar diodes. Inherent in the devices is a reverse leakage component found to have a perimeter trap-assisted tunneling component characteristic of the Si-SiO/sub 2/ surface and evident at doping insufficient for significant band-to-band tunneling. The band-to-band phonon-assisted tunneling and avalanche leakage components are also identified. Introducing surface states through reverse-bias stress induces a Pool-Frenkel electric field enhanced generation/recombination surface leakage component. The induced and trap-assisted tunneling components are distinct. The induced component is found to saturate as available states, dependent on the peak electric field, are exhausted. Trapped charge accumulation after extensive stressing affects the electric field along the surface reducing the induced and trap-assisted tunneling leakage components. >

Design considerations of high-performance narrow-emitter bipolar transistors

The control of the lateral diffusion of the extrinsic base is a key issue in the downscaling of high-speed bipolar transistors for achieving the lowest base resistance without altering the shallow impurity profile of the intrinsic region. This letter will present the effects of lateral encroachment of the extrinsic-base dopant on the characteristics of transistors with submicrometer emitter stripe width, measurement of the amount of encroachment, and its relationship to the vertical profile.

On the very-high-current degradations on Si n-p-n transistors

The stressing of 0.8- mu m double-poly self-aligned Si n-p-n transistors at current densities up to 12.5 mA/ mu m/sup 2/ is discussed. The emitter contact does not fail abruptly; rather, its contact resistance drifts gradually. The contact resistance increases when the current flows out of the emitter and decreases when the current is reversed. The drift in emitter resistance can be thermally accelerated and is consistent with the electromigration phenomenon. The emitter-base junction shows negligible degradation when stressed in normal-mode operation, i.e. the current flows out of the emitter. However, the junction degrades when stressed with open collector or when stressed in inverse mode. The annealing experiments show that the junction degradation results from the interface-state generation. However, the drift in contact resistance cannot be recovered by annealing. The causes of junction degradation are suggested. >

The effects of X-rays on p-n junction leakage currents

The effects of X-ray exposure on two types of p-n junction leakage current are presented. X-rays generate surface states at the oxide-silicon interface and lower the junction electric field at the surface. As a result, the usual field-insensitive generation-recombination current (type 1) increases and the field-sensitive leakage current (type 2) decreases. The type 1 current increases linearly with the incident energy density. From the increment of the type 1 leakage, the surface recombination velocity increases by 1*10/sup 3/ cm/s for every 120 mJ/cm/sup 2/ of incident X-ray exposure. Some surface states are responsible for the reduction of the surface electric field and thus the surface component of the type 2 current. The results resemble that of the late stage of hot-carrier stress. The surface states affecting these two types of leakage have different annealing properties. The ones that increase the type 1 current can be annealed out with a short heat cycle, while the ones that lower the type 2 current require a very long heat cycle to remove. >