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Tze-Chiang Chen

IBM

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Featured researches published by Tze-Chiang Chen.

international symposium on vlsi technology, systems, and applications | 2007

Band Edge High-/spl kappa/ /Metal Gate n-MOSFETs Using Ultra Thin Capping Layers

Vamsi Paruchuri; Vijay Narayanan; Barry P. Linder; Stephen L. Brown; Young-Hee Kim; Yun-Yu Wang; Paul Ronsheim; Rajarao Jammy; Tze-Chiang Chen

Ultra thin layers of magnesium containing cap layers are deposited on Hf based dielectrics prior to deposition of the TiN/Poly-Si electrode stack [1] to achieve band-edge (BE) high-kappa/metal nMOSFETs with good mobility (190 cm2/Vs @ 1 MV/cm) at Tinv (1.45 nm), in a gate first process flow. It is shown that Vt can be modulated anywhere between midgap and band edge by changing the cap layer thickness. Short channel devices with band edge characteristics are demonstrated down to 40 nm.

Archive | 1998

Structure and method for producing low leakage isolation devices

Hiroyuki Akatsu; Tze-Chiang Chen; Laertis Economikos; Herbert L. Ho; Richard L. Kleinhenz; Jack A. Mandelman; Wesley C. Natzle

Archive | 2005

High performance CMOS circuits, and methods for fabricating the same

John C. Arnold; Glenn A. Biery; Alessandro Callegari; Tze-Chiang Chen; Michael P. Chudzik; Bruce B. Doris; Michael A. Gribelyuk; Young-Hee Kim; Barry P. Linder; Vijay Narayanan; J. Newbury; Vamsi Paruchuri; Michelle L. Steen

Archive | 2005

Method to control flatband/threshold voltage in high-k metal gated stacks and structures thereof

Stephen L. Brown; Tze-Chiang Chen; Rajarao Jammy; Vijay Narayanan; Vamsi Paruchuri

Archive | 2009

Structure And Method To Fabricate Metal Gate High-K Devices

Tze-Chiang Chen; Bruce B. Doris; Vijay Narayanan; Vamsi Paruchuri

Archive | 2007

Integration schemes for fabricating polysilicon gate MOSFET and high-K dielectric metal gate MOSFET

Tze-Chiang Chen; Bruce B. Doris; Rangarajan Jagannathan; Hongwen Yan; Qingyun Yang; Ying Zhang

Microelectronic Engineering | 2007

Recent advances and current challenges in the search for high mobility band-edge high-k/metal gate stacks

Vijay Narayanan; Vamsi Paruchuri; E. Cartier; Barry P. Linder; Nestor A. Bojarczuk; Supratik Guha; Stephen L. Brown; Yun-Yu Wang; M. Copel; Tze-Chiang Chen

Archive | 2005

High performance circuit with metal and polygate electrodes

Alessandro Callegari; Tze-Chiang Chen; Michael P. Chudzik; Bruce B. Doris; Young-Hee Kim; Vijay Narayanan; Vamsi Paruchuri; Michelle L. Steen; Ying Zhang

Archive | 1998

Quantum conductive recrystallization barrier layers

Susan E. Chaloux; Tze-Chiang Chen; Johnathan E. Faltermeier; Ulrike Gruening; Rajarao Jammy; Jack A. Mandelman; Christopher Parks; Paul C. Parries; Paul Ronsheim; Yun-Yu Wang

Archive | 2007

Method to fabricate metal gate high-k devices

Tze-Chiang Chen; Bruce B. Doris; Vijay Narayanan; Vamsi Paruchuri

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Vamsi Paruchuri

IBM

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Vijay Narayanan

IBM

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Bruce B. Doris

IBM

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Barry P. Linder

IBM

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Rajarao Jammy

IBM

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Stephen L. Brown

IBM

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Young-Hee Kim

IBM

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Yun-Yu Wang

IBM

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Alessandro Callegari

IBM

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Jack A. Mandelman

IBM

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