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Dive into the research topics where Ege Engin is active.

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Featured researches published by Ege Engin.


electrical performance of electronic packaging | 2005

Mid frequency decoupling using embedded decoupling capacitors

Prathap Muthana; Madhavan Swaminathan; Ege Engin; P. Markondeya Raj; Rao Tummala

Surface mount technology (SMT) decoupling capacitors fail to provide decoupling above 100MHz. This paper presents the use of embedded thin film capacitors to provide decoupling in the mid frequency range from 100MHz to 2GHz. On-chip capacitance provides decoupling above 2GHz. The effect of chip, package and board capacitors on the performance of digital systems is analyzed taking into account the parasitic effects of power/ground planes, vias and solder balls. A synthesis and selection methodology for embedded package capacitors is also presented.


IEEE Transactions on Electromagnetic Compatibility | 2008

Accurate Transient Simulation of Interconnects Characterized by Band-Limited Data With Propagation Delay Enforcement in a Modified Nodal Analysis Framework

Subramanian N. Lalgudi; Ege Engin; Giorgio Casinovi; Madhavan Swaminathan

A numerical-convolution-based approach has been proposed for the accurate transient simulation of interconnects characterized by band-limited (b.l.) frequency-domain (f.d.) data and terminated by arbitrary equivalent circuits. Propagation delay is enforced in the transient results by obtaining causal impulse responses from b.l.f.d. data, extracting the propagation delays from them, and enforcing the delays in the causal impulse responses. Causal impulse responses are obtained through a new minimum- phase/all-pass decomposition of the frequency data. In this decomposition, a new form for the all-pass component has been proposed that preserves the sign of the original frequency response in the reconstructed response, unlike the prior approaches, leading to an accurate transient result. Arbitrary terminations are conveniently handled by integrating the numerical convolution in a modified nodal analysis (MNA) framework, a framework used by commercial circuit simulators, through a new transient simulation formulation. Numerical results demonstrating the accuracy and capability of the proposed procedure have been presented.


IEEE Transactions on Advanced Packaging | 2007

Causality Enforcement in Transient Co-Simulation of Signal and Power Delivery Networks

Rohan Mandrekar; Krishna Srinivasan; Ege Engin; Madhavan Swminathan

This paper discusses a transient simulation method that co-simulates the signal and power delivery networks in a packaged system. The method includes a novel delay extraction technique that enables the enforcement of causality conditions on the resulting transient waveforms. This paper describes the application of the method on a number of test cases to account for electromagnetic parasitics and cross-talk, and shows the scalability of the method for performing large sized transient simulations


electronic components and technology conference | 2006

A novel synthesis method for designing electromagnetic band gap (EBG) structures in packaged mixed signal systems

Tae Hong Kim; Daehyun Chung; Ege Engin; Wansuk Yun; Yoshitaka Toyota; Madhavan Swaminathan

Electromagnetic (EM) simulation of electromagnetic band gap (EBG) structures is computationally expensive when multiple iterations are required. For the first time, in this paper, a novel synthesis method for designing EBG structures has been proposed. The method consists of three major approaches: current path approximation method (CPA-method), border to border radius (B2BR), and power loss method (PLM). CPA-method is based on the current flow on a periodically patterned power/ground plane. CPA-method gives a final dimension of EBG structure for a desired stop band frequency. B2BR determines the maximum number of patches implementable within a given area. PLM calculates isolation level of an EBG structure based on the transmitted power. The proposed approaches have been combined together to synthesize an EBG structure for a given specification. The synthesized EBG structure with these approaches has been fabricated and verified with EM simulation and measurement. The EBG structure has shown excellent stop band and isolation level agreements with the desired specification


international symposium on electromagnetic compatibility | 2005

Design, modeling and characterization of embedded capacitor networks for mid-frequency decoupling in semiconductor systems

P. Muthana; Madhavan Swaminathan; Rao Tummala; P.M. Raj; Ege Engin; Lixi Wan; D. Balaraman; S. Bhattacharya

Embedded passives are gaining in importance due to the reduction in size of consumer electronic products. Among the passives, capacitors pose the biggest challenge due to the large capacitance required for decoupling high performance circuits. This paper focuses on the characterization and modeling of embedded capacitors. Design and modeling of embedded capacitor networks for decoupling semiconductor systems in the mid-frequency band (100 MHz to 2 GHz) will be highlighted in this paper


electrical performance of electronic packaging | 2006

Efficient Modeling of Package Power Delivery Networks with Fringing Fields and Gap Coupling in Mixed Signal Systems

Krishna Bharath; Ege Engin; Madhavan Swaminathan; Kazuhide Uriu; Toru Yamada

Full-wave EM simulations are computationally expensive given the complexity of packaging structures in modern mixed signal systems. Fast methods such as the transmission matrix method are inaccurate as they do not model discontinuities such as metal edges and gaps. In this paper, simple models for the edge effect and gap coupling are developed for the finite difference frequency domain method. Results are presented comparing the accuracy of the proposed method with full-wave simulations and measurements


design automation conference | 2008

Automatic package and board decoupling capacitor placement using genetic algorithms and M-FDM

Krishna Bharath; Ege Engin; Madhavan Swaminathan

In the design of complex power distribution networks (PDN) with multiple power islands, it is required that the PDN represents a low impedance as seen by the digital modules. This is to reduce the simultaneous switching noise (SSN), generated due to the switching activity of digital drivers. Typically this reduction in impedance is accomplished by placing decoupling capacitors between the power and ground planes of a package or board. However, the performance of the decoupling solution is a function of capacitor selection and its placement. In this paper, an automatic capacitor placement optimization method has been proposed. This method relies on a genetic algorithm to provide a stochastic search of the design space, while employing an efficient core PDN simulator based on the multi-layer finite difference method (M-FDM). The technique has been employed to show optimized placements for split planes as well as for a realistic multi-layer server board.


international symposium on quality electronic design | 2006

Enhancement of Signal Integrity and Power Integrity with Embedded Capacitors in High-Speed Packages

Krishna Srinivasan; Prathap Muthana; Rohan Mandrekar; Ege Engin; Jinwoo Choi; Madhavan Swaminathan

Improvements in electrical performance of microelectronic systems can be achieved by the integration of passive elements such as capacitors, resistors and inductors. The advantage of embedded passives is their low parasitic values. In this paper, enhancement of signal-integrity and power-integrity is investigated when a high-k planar capacitor is used as a power-ground plane, with embedded high-k discrete capacitors that have low ESI and ESR values as decoupling capacitors for SSN suppression. In order to capture the effects of embedded capacitor performance, a test-structure involving many signal-lines referenced to a power-ground plane was simulated. Simulation results show that the high-k planar capacitor reduces coupling of noise currents through the power-ground planes and helps improve the eye-opening. Simulation results have been quantified for a case, where a fewer number of embedded discrete capacitors helps reduce SSN more significantly than surface-mounts. Transient co-simulation of the signal delivery network (SDN) and the power-delivery network (PDN) are performed using Y-parameters


design automation conference | 2006

System level signal and power integrity analysis methodology for system-in-package applications

Rohan Mandrekar; Krishna Bharath; Krishna Srinivasan; Ege Engin; Madhavan Swaminathan

This paper describes a methodology for performing system level signal and power integrity analyses of SiP-based systems. The paper briefly outlines some new modeling and simulation techniques that have been developed to enable the proposed methodology. Some results based on the application of this methodology on test systems are also presented


electronic components and technology conference | 2008

Noise induced jitter in differential signaling

Janani Chandrasekhar; Ege Engin; Madhavan Swaminathan; Kazuhide Uriu; Toru Yamada

Differential lines are extensively used in high-speed digital circuits due to their ability to improve signal integrity by rejecting common-mode noise. However noise is injected into differential signals when there are irregularities in the signaling setup. These anomalies may be via transitions of differential lines through power planes in power distribution systems, via stubs, asymmetric lengths of differential lines, different transition points for each of the differential vias etc. This paper quantifies noise due to irregular differential structures in frequency domain. Presence of noise in differential signaling is verified through a set of test vehicles. The effect of signal to power coupling from differential lines on signal jitter is also investigated.

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Madhavan Swaminathan

Georgia Institute of Technology

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Krishna Srinivasan

Georgia Institute of Technology

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Rao Tummala

Georgia Institute of Technology

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Krishna Bharath

Georgia Institute of Technology

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Prathap Muthana

Georgia Institute of Technology

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Rohan Mandrekar

Georgia Institute of Technology

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Tae Hong Kim

Georgia Institute of Technology

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Ki Jin Han

Georgia Institute of Technology

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