Ejg Erwin Janssen

Analysis and Design of a 60 GHz Wideband Voltage-Voltage Transformer Feedback LNA

To cope with the problem of instability and imperfect reverse isolation, a millimeter-wave voltage-voltage transformer feedback low noise amplifier has been analyzed, designed, and measured in CMOS 65 nm technology. Analytical formulae are derived for describing the stability, gain, and noise in this circuit topology. An analogy with the classic concept of Masonss invariant is used to illustrate how the transformer feedback provides the required reverse isolation in the LNA. Based on the developed theoretical analysis, the circuit is implemented as a fully integrated 60 GHz two-stage differential low noise amplifier in 65 nm CMOS technology. A flat gain of 10 dB is achieved over the entire 6 GHz bandwidth. The measured noise figure is 3.8 dB.

Fully balanced 60 GHz LNA with 37 % bandwidth, 3.8 dB NF, 10 dB gain and constant group delay over 6 GHz bandwidth

This paper presents a two-stage fully integrated 60 GHz differential Low Noise Amplifier implemented in a TSMC bulk CMOS 65 nm technology. Implementation of a voltage-voltage feedback enables the neutralization of the Miller capacitance and the achievement of flat gain with a deviation of ± 0.25 dB over the entire 6 GHz bandwidth. It features a transducer gain (Gt) of 10 dB along with a noise figure (NF) of 3.8 dB, NFmin of 3.7 dB and a constant delay time. IIP3 is 4 dBm. It consumes 35 mW from a 1.2 V supply and only occupies 330 × 170 µm.

Experimental Evaluation of an Adaptive Nonlinear Interference Suppressor for Multimode Transceivers

In multimode transceivers, the transmitter for one communication standard may induce a strong interference in the receiver for another standard. Using linear filtering techniques to suppress this interference requires a receiver with a very large dynamic range, leading to an excessive power consumption. A much more power efficient approach suppresses the interference using an adaptive nonlinear interference suppressor (NIS). In previous work an ideal model was used to derive an adaptation method and study the receiver performance afforded by the NIS. In this paper, we present experimental results of a receiver that uses an implementation of the NIS, fabricated in 140 nm complementary metal-oxide-semiconductor technology. Main imperfections that limit the NIS performance are identified, simple models are developed that explain the experimental results, and for the key imperfections, low-complexity digital compensation and calibration methods are proposed. These digital methods permit the use of lower-performance analogue circuits, thus further reducing the transceiver cost and power consumption. The experimental results show that the NIS can achieve a substantial interference suppression at attractive complexity and power dissipation.

Monolithic Transformers for High Frequency Bulk CMOS Circuits

3B Abstract — This paper presents two monolithic transformer structures exhibiting high self resonance frequencies(fSR). Effect of positive and negative coupling factor on self resonance frequency is investigated. The transformer turn ratio and structure is selected to improve design and ease layout of a high frequency LNA and VCO. Measurement results of a transformer show good agreement with simulated values and demonstrate a coupling factor of 0.7 at 20 GHz. 4B Index Terms — CMOS integrated circuits, Coupling factor, Monolithic transformer, self resonance frequency.

A 1.8GHz amplifier with 39dB frequency-independent smart self-interference blocker suppression

This paper presents a 1.8GHz RF amplifier implemented in 140nm CMOS with frequency-independent blocker suppression. The functionality is obtained by adaptation of a nonlinear current transfer according to the blocker amplitude. In the presence of a 0-11dBm RF blocker a voltage gain of 7.6 to 9.4dB and IIP3 >;4dBm are measured, while the blocker is suppressed by more than 39dB. In case of no blocker the circuit is set to amplifier mode providing 17dB of voltage gain, 8.4dB noise figure and IIP3 of 6.6dBm while consuming 3mW. Application areas are coexistence in multi-radio devices and dealing with TX leakage in FDD systems.

Increasing Isolation Between Colocated Antennas Using a Spatial Notch

This letter presents an antenna configuration to achieve a coupling reduction between colocated antennas. Application of an adaptive spatial notch enables this functionality. Analytical results are obtained, which show good resemblance to simulated and measured results, performed on a prototype manufactured to operate around 2.5 GHz. Coupling reduction of 50 dB has been measured. The antenna impedance is also influenced because of this configuration and shows an S11 better than - 15 dB at the frequency of interest. In addition, the radiation pattern of both antennas is influenced. This can be seen as an advantage or a disadvantage, depending on the application.

Noise figure and S-parameter measurement setups for on-wafer differential 60GHz circuits

On-wafer measurement setups are introduced for measuring the noise figure and s-parameters of differential 60GHz circuits. The need for expensive four-port mm-wave vector network analyzers is circumvented by using magic-Ts, providing a minimum CMRR of 20dB, in combination with cheaper two-port mm-wave network analyzers. Waveguide interfaces are used in the vicinity of the RF probes to achieve a robust and repeatable setup, as the cables at mm-wave frequencies are prone to impedance and delay variation due to movement and bending. The noise figure of a double-balanced 60GHz mixer and the noise figure and s-parameters of a differential 60GHz LNA are measured using this setup and the measurement results are in good agreement with the simulations.

Digital Compensation of Cross-Modulation Distortion in Multimode Transceivers

In a multimode transceiver, the transmitter for one communication standard induces a large interference on the receiver for another one. When this large interference passes through the inherently nonlinear receiver Front-End (FE), it introduces Cross- Modulation (CM) distortion. Increasing the FE linearity to lower the CM distortion leads to unacceptable power consumption for a handheld device. Considering the continuous increase of digital computation power governed by Moores law an attractive alternative approach is to digitally compensate for the CM distortion. An existing CM compensation method is tailored to single-mode transceivers and requires an auxiliary FE. By using the locally available transmitted interference in the multimode transceiver, we propose a CM compensation method which requires no additional analog hardware. Hence the power consumption and complexity of the multimode transceiver will be reduced significantly.

Modeling and analysis of nonlinearities and bandwidth limitations in RF receivers

Reduction of the power consumption of analog circuits used in RF receivers, leads to decreased linearity. Digital algorithms can be used in the receiver to compensate for the distortion components that are created due to this. This leads to a trade-off between power consumption in the analog domain and digital domain. Most research concerning this topic concentrates on signal processing, and uses a polynomial to model the nonlinear effects observed in these circuits. Often memory effects are not taken into account, and the polynomials used are only able to model weakly nonlinear behavior. In this paper the behavior of RF circuits is analyzed leading to a look-up table model, which is able to compensate strongly nonlinear circuits including memory effects. To validate the discussed model, measurements are performed on a low noise amplifier.