P Pooyan Sakian

Analysis and Design of a 60 GHz Wideband Voltage-Voltage Transformer Feedback LNA

To cope with the problem of instability and imperfect reverse isolation, a millimeter-wave voltage-voltage transformer feedback low noise amplifier has been analyzed, designed, and measured in CMOS 65 nm technology. Analytical formulae are derived for describing the stability, gain, and noise in this circuit topology. An analogy with the classic concept of Masonss invariant is used to illustrate how the transformer feedback provides the required reverse isolation in the LNA. Based on the developed theoretical analysis, the circuit is implemented as a fully integrated 60 GHz two-stage differential low noise amplifier in 65 nm CMOS technology. A flat gain of 10 dB is achieved over the entire 6 GHz bandwidth. The measured noise figure is 3.8 dB.

Fully balanced 60 GHz LNA with 37 % bandwidth, 3.8 dB NF, 10 dB gain and constant group delay over 6 GHz bandwidth

This paper presents a two-stage fully integrated 60 GHz differential Low Noise Amplifier implemented in a TSMC bulk CMOS 65 nm technology. Implementation of a voltage-voltage feedback enables the neutralization of the Miller capacitance and the achievement of flat gain with a deviation of ± 0.25 dB over the entire 6 GHz bandwidth. It features a transducer gain (Gt) of 10 dB along with a noise figure (NF) of 3.8 dB, NFmin of 3.7 dB and a constant delay time. IIP3 is 4 dBm. It consumes 35 mW from a 1.2 V supply and only occupies 330 × 170 µm.

Monolithic Transformers for High Frequency Bulk CMOS Circuits

3B Abstract — This paper presents two monolithic transformer structures exhibiting high self resonance frequencies(fSR). Effect of positive and negative coupling factor on self resonance frequency is investigated. The transformer turn ratio and structure is selected to improve design and ease layout of a high frequency LNA and VCO. Measurement results of a transformer show good agreement with simulated values and demonstrate a coupling factor of 0.7 at 20 GHz. 4B Index Terms — CMOS integrated circuits, Coupling factor, Monolithic transformer, self resonance frequency.

A 60GHz Miller Effect Based VCO in 65nm CMOS with 10.5% Tuning Range

This paper presents a 60 GHz voltage controlled oscillator implemented in conventional 65 nm CMOS technology. This VCO employs an alternative tuning system based on the Miller capacitance instead of conventional varactors. The presented VCO has a tuning range of 10.5 % and operates in the frequency range of 59.5 GHz to 66.1 GHz. It has an output power of -13 dBm and a phase noise of 80 dBc to -85 dBc/Hz @ 1 MHz over its entire range. The figure-of-merit (FOM) of this VCO is -162 dB.

Wideband cancellation of second order intermodulation distortions in a 60GHz zero-IF mixer

The 1GHz target IF bandwidth of 60GHz zero-IF mixers makes conventional single- and double-parameter tuning methods ineffective for suppression of second-order intermodulation distortions across the whole IF band. In this paper a three-dimensional circuit parameter tuning method is used to address this problem. Output resistance, output capacitance, and gate biasing of the switching pairs are three parameters chosen for tuning. The mixer is designed and fabricated in CMOS 45nm technology. Measurement results show that the IMD2 tones across the whole 1GHz IF band can be suppressed simultaneously to within the noise level. The measured power conversion gain, IIP3 and typical corrected IIP2 of the mixer are 7dB, −7dBm and 27dBm, respectively.

System-Level Design for Robustness

The increasing demand for compactness and speed of digital circuits and the necessity of integration of the digital backend electronics with radio frequency frontends, calls for exploiting deep submicron technologies in RF circuit design. However, scaling into the deep submicron regime, mainly in CMOS technologies, accentuates the effect of process spread and mismatch on the fabrication yield [10]. Furthermore, design for manufacturability requires all manufacturing and process variations to be considered in the design procedure. Statistical circuit-level methods based on modeling data provided by fabrication foundries, e.g. Monte Carlo, are extensively used to evaluate the effect of process spread and are utilized by simulation tools to design circuits with the desired performance over the specified range of process variation [8]. However, most of these statistical methods are based on random variation of design variables which need long simulation times for large-scale circuits, like a full receiver. Furthermore, as the size and complexity of designs is increased, less insight is obtained from these random statistical methods.

Smart-Component Design at 60 GHz

In this chapter, circuit level solutions are presented for coping with the impact of process variations. One of the problems associated with process-variation-induced mismatch is the second order intermodulation distortion (IMD2). Based on the system-level analysis of Chap. 2, the overall performance of a receiver is more sensitive to the noise and nonlinearity distortion of the building blocks which contribute more to the total noise and distortion. The contribution of the stages prior to the mixer in a zero-IF receiver to the total IMD2 can be suppressed by filtering. However, the IMD2 generated by the zero-IF mixer lies in the IF band and cannot be filtered. In Sect. 5.1, a tunable mixer is implemented for correcting the mismatches and minimizing the IMD2. Furthermore, since in many of the system-level analyses the IMD3 is presumed as the dominant source of intermodulation distortion, suppressing the IMD2 by this method prevents violating this assumption.

Layout and Measurements at 60 GHz

In this chapter the layout procedure, layout challenges, and measurement setups for 60 GHz circuits designed in this work are explained. Millimeter-wave integrated circuits face additional difficulties in circuit design, layout, and measurement, as compared to their lower frequency counterparts. The parasitic effects are so much accentuated at these frequencies that the designer is required to shift repeatedly the focus from circuit-schematic level to layout and vice versa. In fact the mm-wave circuits may fail to operate correctly just as a result of layout problems. For instance inappropriate interconnect sizing in the layout of a mm-wave voltage-controlled oscillator (VCO) can cause failure of oscillation.

Component Design at 60 GHz

In this chapter several 60 GHz components are presented and designed in standard CMOS technologies with intrinsically high performance without exhibiting smartness for post-fabrication performance fine tuning. In Chap. 5, smart component will be discussed which are capable of performance tuning for process spreading compensation.

RF-Frontend Design for Process-Variation-Tolerant Receivers

Data exchange and data processing are two vital elements in our age of information which is distinguished by the possibility of free and instant access to knowledge for public. Since the experimental verification of the existence of electromagnetic waves by Heinrich Hertz in 1887, which was literally the first implementation of transmission and reception of radio electromagnetic waves, and achieving wireless transatlantic communication by Marconi in 1901, the wireless applications have observed a tremendous growth, as a widespread means of information exchange.