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Ekkehard Pruefer

Advanced Micro Devices

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Publication

Featured researches published by Ekkehard Pruefer.

Archive | 2005

Semiconductor device including semiconductor regions having differently strained channel regions and a method of manufacturing the same

Manfred Horstmann; Ekkehard Pruefer; Wolfgang Buchholtz

Archive | 2006

TRENCH ISOLATION STRUCTURE FOR A SEMICONDUCTOR DEVICE WITH REDUCED SIDEWALL STRESS AND A METHOD OF MANUFACTURING THE SAME

Klaus Hempel; Stephan Kruegel; Ekkehard Pruefer

Archive | 2006

METHOD FOR REDUCING SILICIDE DEFECTS BY REMOVING CONTAMINANTS PRIOR TO DRAIN/SOURCE ACTIVATION

Markus Lenski; Ralf van Bentum; Ekkehard Pruefer

Archive | 2004

Halbleiterelement mit Halbleitergebieten, die unterschiedlich verformte Kanalgebiete aufweisen, und Verfahren zur Herstellung des Halbleiterelements

Wolfgang Buchholtz; Manfred Horstmann; Ekkehard Pruefer

Archive | 2007

Semiconductor component e.g. field-effect transistor, producing method, involves forming endowed region in semiconductor region, covering semiconductor region by dielectric layer, and forming victim coating on semiconductor region

Markus Lenski; Ralf van Bentum; Ekkehard Pruefer

Archive | 2006

Method for production of integrated circuits, involves building dielectric coating over substrate, which has gate electrode formed over active area and is separated by gate isolation layer

Ralf van Bentum; Klaus Hempel; Stephan Kruegel; Ekkehard Pruefer

Archive | 2006

A method for reducing Siliziddefekten by removing contaminants prior to the drain / source activation

Markus Lenski; Ralf van Bentum; Ekkehard Pruefer

Archive | 2006

Verfahren zur Herstellung einer Drain/Source-Erweiterungsstruktur eines Feldeffekttransistors mit reduzierter Bordiffusion und Transistor A process for preparing a drain / source extension structure of a field effect transistor with a reduced boron diffusion and transistor

Ralf van Bentum; Klaus Hempel; Stephan Kruegel; Ekkehard Pruefer

Archive | 2005

Grabenisolationsstruktur für ein Halbleiterbauelement mit reduzierter Seitenwandverspannung und Verfahren zur Herstellung desselben Of the same grave isolation structure for a semiconductor device with reduced side wall bracing and methods for making

Klaus Hempel; Stephan Kruegel; Ekkehard Pruefer

Archive | 2005

Verfahren zur Herstellung eines Halbleiterbauelements mit Isolationsgraben mit reduzierter Seitenwandverspannung A process for producing a semiconductor device with isolation trench with a reduced side wall bracing

Klaus Hempel; Stephan Kruegel; Ekkehard Pruefer

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Stephan Kruegel

Advanced Micro Devices

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Manfred Horstmann

Advanced Micro Devices

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Wolfgang Buchholtz

Advanced Micro Devices

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Markus Lenski

Advanced Micro Devices

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Ralf van Bentum

GlobalFoundries

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Klaus Hempel

GlobalFoundries

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Klaus Hempel

GlobalFoundries

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Ralf van Bentum

GlobalFoundries

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