Enekoitz Ormaetxea

A Step Forward Towards the Development of Reliable Matrix Converters

The matrix converter can be used in a wide range of applications. Nevertheless, it does not yet represent a sufficiently mature option for industrialization. In order to resolve this problem, this paper examines the hardware of the matrix converter and identifies all the circuits that should be included in this. It also quantifies the operating conditions and provides practical guidelines for the step-by-step design of a matrix converter. These considerations are validated with experimental results. In this way, it can be said that this paper represents a step forward toward the development of reliable matrix converters for real applications.

Matrix Converter Protection and Computational Capabilities Based on a System on Chip Design With an FPGA

The matrix converter (MC) presents a promising topology that needs to overcome certain barriers (complexity of the modulation and control techniques, protection systems, etc.) in order to gain a foothold in the industry. Traditionally, the MC has been controlled by means of a DSP, together with a field-programmable gate array (FPGA). The sole aim of the latter is to perform the safe commutation of the converter. This involves a waste of resources, as the excellent features of the FPGA are infrautilized by the control system. This paper deals with the implementation of the double-sided space vector modulation (DS SVM), commutation, reference-frame changes, and protection of the MC through a series of hardware blocks (cores) integrally implemented in an FPGA. The designed cores are technology-independent descriptions, which means that the developed design can be used in the FPGAs of any manufacturer. Moreover, the proposed design, which has been validated experimentally, has obviated the need to use a DSP. Likewise, given that all the processing capabilities have been integrated in a single chip, it can be said that an FPGA-based system on a programmable chip (SoPC) has been designed. Due to the computational capacity of the developed cores, processing time is reduced to the order of nanoseconds. This allows a response in real time and very high modulation frequencies can be attained. Moreover, these cores operate independently, and simultaneously, therefore obviating the need for sequential control and its resulting latencies and leading to an increase in the safety of the MC.

A fault tolerant space vector modulation strategy for matrix converters

The topology of the Matrix Converter (MC) is promising because of its intrinsic advantages. Nevertheless, the MC is not as robust as other converters and therefore, under certain fault situations, the converter may be damaged. Certain applications of the MC, such as aeronautics, submarines, etc. require fault tolerant strategies that guarantee the continuous operation of the system under fault conditions. This article examines, in the first place, the behavior of the MC when it is protected by the clamp circuit and one of its switches is in open circuit due to a fault. In order to improve the fault tolerance of the MC, three SVM modulation variations are proposed. On the one hand, two of these variations guarantee the safety of the converter, but the THD of the synthesized voltages and currents is high. On the other hand, the third strategy enhances these and ensures the control of a PMSM in a fault situation.

Matrix Converter: Improvement of the Space Vector Modulation via a new double-sided generalized Scalar PWM

This paper presents a particular modulation technique based on the generalized scalar pulse width modulation strategy for matrix converters. The objective of this solution is producing identical duty cycles and double-sided switching pattern that the well-known space vector modulation technique without the high memory requirements and the complex trigonometric operations of the last. Both the space vector and the proposed modulation techniques are simulated in a permanent magnet synchronous machine fed by a matrix converter. Its performances are compared with respect to total harmonic distortion (THD), execution times, number of operations and memory requirements. A wide range of simulations are carried out to verify the advantages of the proposed modulation technique when compared with the space vector modulator.

Implementation of an electrical micro-grid through matrix converters connected in parallel

The matrix converter (MC) arouses a growing interest because it provides many advantages. On the other hand, the association of these converters in parallel makes the operation of the system operation more reliable and offers the possibility of creating electrical micro-grids. This article presents a parallel association of MCs by droop parallelization technique, which allows the control of several parallel MCs without needing communication between them. This configuration also offers the possibility to achieve an even load sharing. The obtained results demonstrate the feasibility of this technique.

FPGA based real time simulation of a Matrix Converter

Recently, Matrix Converter (MC) has attracted the interest of the scientific community. Due to the complexity of its control, simulation of this converter is a time consuming task. In this work, an FPGA based MC model is presented, allowing the simulation of a detailed MC in real-time.

System on Chip cores for protection and commutation of a matrix converter

This article deals with the implementation of the commutation and protection of the matrix converter (MC) via some hardware blocks (cores) implemented in an FPGA. Thanks to the computational capacity of the cores, processing time is reduced. This allows a response in real time improving the safety of the MC.