Iñigo Kortabarria

New Protection Circuit for High-Speed Switching and Start-Up of a Practical Matrix Converter

The matrix converter (MC) presents a promising topology that needs to overcome certain barriers (protection systems, durability, the development of converters for real applications, etc.) in order to gain a foothold in the market. Taking into consideration that the great majority of efforts are being oriented toward control algorithms and modulation, this paper focuses on MC hardware. In order to improve the switching speed of the MC and thus obtain signals with less harmonic distortion, several different insulated-gate bipolar transistor (IGBT) excitation circuits are being studied. Here, the appropriate topology is selected for the MC, and a recommended configuration is selected, which reduces the excursion range of the drivers, optimizes the switching speed of the IGBTs, and presents high immunity to common-mode voltages in the drivers. Inadequate driver control can lead to the destruction of the MC due to its low ride-through capability. Moreover, this converter is especially sensitive during start-up, as, at that moment, there are high overcurrents and overvoltages. With the aim of finding a solution for starting up the MC, a circuit is presented (separate from the control software), which ensures correct sequencing of supplies, thus avoiding a short circuit between input phases. Moreover, it detects overcurrent, connection/disconnection, and converter supply faults. Faults cause the circuit to protect the MC by switching off all the IGBT drivers without latency. All this operability is guaranteed even when the supply falls below the threshold specified by the manufacturers for the correct operation of the circuits. All these features are demonstrated with experimental results. Lastly, an analysis is made of the interaction that takes place during the start-up of the MC between the input filter, clamp circuit, and the converter. A variation of the clamp circuit and start-up strategy is presented, which minimizes the overcurrents that circulate through the converter. For all these reasons, it can be said that the techniques described in this paper substantially improve the MC start-up cycle, representing a step forward toward the development of reliable MCs for real applications.

Modulation Strategy for Multiphase Neutral-Point-Clamped Converters

This paper presents a novel modulation strategy for n-phase neutral-point-clamped (NPC) converters. The proposed modulation strategy is able to control and completely remove the low-frequency neutral-point (NP) voltage oscillations for any operation point and load types. Even when unbalanced and/or nonlinear loads are considered, the NP voltage remains under total control. Consequently, the strategy is very attractive for n-phase active filters. In addition, it enables the use of low-capacity film capacitors in NPC converters. The proposed modulation takes the carrier-based modulation strategy as a basis. It is formulated following a generalized approach that makes it expandable to n-phase NPC converters. In addition, the NP voltage is controlled directly using a closed-loop algorithm that does not rely on the use of the linear control regulators or the additional compensators used in other modulation algorithms. Therefore, no tuning of parameters is required and it performs optimally for any operating conditions and kind of loads, including unbalanced and nonlinear loads. Although the high-frequency harmonic content of the output voltages may increase, the weighted total harmonic distortion generated by the proposed strategy is similar to that of a standard sinusoidal pulse width modulated strategy. The proposed modulation algorithm has been tested in a four-leg NPC converter prototype performing as a three- and four-phase system and operating with balanced and unbalanced loads.

A Step Forward Towards the Development of Reliable Matrix Converters

The matrix converter can be used in a wide range of applications. Nevertheless, it does not yet represent a sufficiently mature option for industrialization. In order to resolve this problem, this paper examines the hardware of the matrix converter and identifies all the circuits that should be included in this. It also quantifies the operating conditions and provides practical guidelines for the step-by-step design of a matrix converter. These considerations are validated with experimental results. In this way, it can be said that this paper represents a step forward toward the development of reliable matrix converters for real applications.

Matrix Converter Protection and Computational Capabilities Based on a System on Chip Design With an FPGA

The matrix converter (MC) presents a promising topology that needs to overcome certain barriers (complexity of the modulation and control techniques, protection systems, etc.) in order to gain a foothold in the industry. Traditionally, the MC has been controlled by means of a DSP, together with a field-programmable gate array (FPGA). The sole aim of the latter is to perform the safe commutation of the converter. This involves a waste of resources, as the excellent features of the FPGA are infrautilized by the control system. This paper deals with the implementation of the double-sided space vector modulation (DS SVM), commutation, reference-frame changes, and protection of the MC through a series of hardware blocks (cores) integrally implemented in an FPGA. The designed cores are technology-independent descriptions, which means that the developed design can be used in the FPGAs of any manufacturer. Moreover, the proposed design, which has been validated experimentally, has obviated the need to use a DSP. Likewise, given that all the processing capabilities have been integrated in a single chip, it can be said that an FPGA-based system on a programmable chip (SoPC) has been designed. Due to the computational capacity of the developed cores, processing time is reduced to the order of nanoseconds. This allows a response in real time and very high modulation frequencies can be attained. Moreover, these cores operate independently, and simultaneously, therefore obviating the need for sequential control and its resulting latencies and leading to an increase in the safety of the MC.

A fault tolerant space vector modulation strategy for matrix converters

The topology of the Matrix Converter (MC) is promising because of its intrinsic advantages. Nevertheless, the MC is not as robust as other converters and therefore, under certain fault situations, the converter may be damaged. Certain applications of the MC, such as aeronautics, submarines, etc. require fault tolerant strategies that guarantee the continuous operation of the system under fault conditions. This article examines, in the first place, the behavior of the MC when it is protected by the clamp circuit and one of its switches is in open circuit due to a fault. In order to improve the fault tolerance of the MC, three SVM modulation variations are proposed. On the one hand, two of these variations guarantee the safety of the converter, but the THD of the synthesized voltages and currents is high. On the other hand, the third strategy enhances these and ensures the control of a PMSM in a fault situation.

Improvement of the Design Process of Matrix Converter Platforms Using the Switching State Matrix Averaging Simulation Method

The matrix converter (MC) is arousing considerable attention as an alternative for conventional ac/ac converters due to the advantages it offers. However, the control and modulation of this converter is complex. This, together with the fact that the MC usually operates at high modulation frequencies, makes the computational load of the platform to be simulated excessively high. All this makes the simulation time of models including the MC excessively long, even more so when both the transient and steady state of the system must be analyzed. This paper presents a new MC simulation technique called Switching State Matrix Averaging (SSMA). Although this is a fixed-step technique, a long simulation step can be used without forfeiting the accuracy of an ideal variable-step simulation. Likewise, the SSMA drastically speeds up the simulation, reducing the amount of required resources and the tuning time of the complex platforms in which the MC is used. A series of simulations has been performed in order to verify the proposed method. Moreover, a comparison between experimental and simulation results has been made, demonstrating the effectiveness of the proposed method.

Switching Frequency Behaviour for a Practical Matrix Converter

There are certain barriers that prevent the commercialisation of matrix converters. In the design of a real converter, the parameters that intervene in the modulation and commutation must be quantified with precision. This paper defines the commutation parameters that intervene in a vector modulation algorithm (SVM). On the other hand, it determines the commutations that occur when the double sided SVM technique is used both with semi-soft commutation, assessing the influence of the modulation frequency and technique on the design of the filter, driver consumption and their power sources. All this facilitates the dimensioning of the clock and the resolution of the variables to be used in the implementation of the algorithm in a FPGA. The paper concludes with a series of experimental results made with a Eupec module, allowing the selection of MC components

Three-Phase VSI Optimal Switching Loss Reduction Using Variable Switching Frequency

Loss reduction in converters is one of main targets in power electronics to obtain higher efficiency and lower thermal stress, which can enhance the lifetime of devices. This paper presents a variable switching frequency technique for switching loss reduction in a three-phase voltage source inverter, obtaining similar output current quality as that of a space vector pulse width modulation (SVPWM) algorithm. This type of optimization has not been applied for a three-phase system before. Simulation and experimental results are also shown. The output current ripple rms value of three-phase SVPWM is used as the optimization constraint. Results of the optimization of the switching losses with quality constraints in the switching frequency as the variable are presented for different load angles and compared with classical SVPWM. Experimental results show that this technique can save up to nearly

Matrix Converter: Improvement of the Space Vector Modulation via a new double-sided generalized Scalar PWM

19\%

A new hardware solution for a fault tolerant matrix converter

in switching losses with similar total harmonic distortion of the output current, concluding that converter losses are reduced without reducing output current quality.