F.-J. Tegude

Controllable p-type doping of GaAs nanowires during vapor-liquid-solid growth

We report on controlled p-type doping of GaAs nanowires grown by metal-organic vapor-phase epitaxy on (111)B GaAs substrates using the vapor-liquid-solid growth mode. p-type doping of GaAs nanowires was realized by an additional diethyl zinc flow during the growth. Compared to nominally undoped structures, the current increases by more than six orders of magnitude. The transfer characteristics of fabricated nanowire metal-insulator-semiconductor field-effect transistor devices proved p-type conductivity. By adjusting the II/III ratio, controlled doping concentrations from 4.6×1018 up to 2.3×1019 cm−3 could be achieved at a growth temperature of 400 °C. The doping concentrations were estimated from electrical conductivity measurements applied to single nanowires with different diameters. This estimation is based on a mobility versus carrier concentration model with surface depletion included.

Evidence of type‐II band alignment at the ordered GaInP to GaAs heterointerface

Interfacial characteristics of Ga0.51In0.49P/GaAs heterostructures grown by metal‐organic vapor‐phase epitaxy in the temperature range from 600 °C to 730 °C were studied. Photoluminescence (PL) measurements have been used for this purpose. A PL peak with an energy of about 1.425 eV (870 nm) was continuously observed in samples containing the GaInP‐to‐GaAs interface. Excitation power dependent PL measurements show that this peak belongs to an excitonic recombination. Furthermore, a strong blue‐shift of this PL‐peak energy was observed as the excitation power increased. We attribute the 870 nm peak to the radiative recombination of spatially separated electron‐hole pairs and suggest the type‐II band alignment at the ordered GaInP to GaAs heterointerface under growth conditions reported here. Further investigations using x‐ray diffraction measurements and simulations with dynamical theory show that the lower and upper interfaces are not equivalent. This explains the absence of type‐II transition in most GaAs...

Novel MOBILE gates with low-power, relaxed parameter sensitivity, and increased driving capability

Negative-differential resistance devices, i.e. Resonant Tunneling Diodes (RTD) have recently enabled a substantial improvement in low-power memories and high-speed logic gates. For logic circuits two series connected RTDs are monolithically integrated with parallel HFET input branches building the monostable-bistable transition logic element (MOBILE). In this paper we report on drastic improvements of the MOBILE concept addressing the major restrictions: trade-off between output driving capability, number of inputs and additional current for the parallel input branches, critical design criteria for two independent technologies: HFET (threshold voltage, lateral current density) and RTD (device area, vertical current density).

Growth temperature dependent band alignment at the Ga0.51In0.49P to GaAs heterointerfaces

Photoluminescence analysis of Ga0.51In0.49P/GaAs single‐quantum well structures grown by metal‐organic vapor‐phase epitaxy in the temperature range from 570 to 720 °C have been carried out. Besides the GaAs band‐edge emissions, all SQW samples studied here exhibit a dominant long‐wavelength peak, which is attributed to the spatially indirect transition due to the type‐II band alignment of Ga0.51In0.49P/GaAs heterojunctions. The energy of the type‐II PL emission has been found to depend strongly on the growth temperature indicating the strong influence of the growth temperature on the band alignment. The shifts of the type‐II PL emission have been used to estimate the growth temperature dependent conduction and valence band discontinuity of the Ga0.51In0.49P/GaAs heterojunction. X‐ray diffraction measurements and simulations using the dynamical theory were carried out to study the influence of the growth temperature on the unintended interfacial layers.

X‐ray diffraction characterization of highly strained InAs and GaAs layers on InP grown by metalorganic vapor‐phase epitaxy

Using high resolution x‐ray diffraction highly strained extremely thin InAs and GaAs layers grown on InP substrates by low‐pressure metalorganic vapor‐phase epitaxy have been studied. In order to determine the growth rate and the layer quality of extremely thin InAs and GaAs different kind of test structures are developed. InAs/In0.53Ga0.47As, GaAs/In0.53Ga0.47As, and InAs/GaAs/In0.53Ga0.47As superlattice structures were prepared, providing independent informations about InAs and GaAs growth rate under high strain, layer quality, and strain compensation effects. A relation was derived, which allows the direct calculation of the layer thicknesses of individual layers within a superlattice, avoiding the time consuming computer fitting. The thicknesses of very thin InAs and GaAs layers can be determined by extracting parameters from the rocking curve. Samples grown with various strained layer thicknesses and periods were analyzed and compared. Dramatic broadening of satellite peaks with increasing InAs thick...

A novel 3-D integrated RTD-HFET frequency multiplier

A frequency multiplier circuit using a resonant tunneling diode (RTD) as a load of a HFET is developed. Based on 3D-monolithic integration on a semi-insulating InP-substrate, a demonstrator is realised generating odd higher harmonics with high efficiency. The multiplier is highly compact and combines amplification of the fundamental frequency in the HFET with the high switching performance of the RTD. The Microwave Design System is used to evaluate its ultra high frequency potential predicting 0.115 times the voltage amplitude of the fundamental input signal for the third harmonic at 100 GHz. Optimization of the circuit design and the RTD-layer structure on top of the HFET with respect to the peak and valley parameters will increase the efficiency.

High frequency characterisation of single InAs nanowire field-effect transistors

We report on a first RF characterisation of single InAs nanowire channel field-effect-transistors. The nanowires with about 30 nm diameter are transferred to a carrier substrate and contacted with a coplanar waveguide pad configuration with a pitch down to 50 mum. Magnesium oxide as well as SiNx are used as gate dielectric for high performance MISFET type field-effect-transistors. Small signal scattering parameter measurements have been performed on-wafer. The nanowire FET exhibit an ultra-small intrinsic gate-source capacitance Cgs down to a few hundred ato Farad, making a careful de-embedding of the data indispensable. First measurements have shown a maximum stable gain higher than 30 dB at low frequency and a maximum oscillation frequency of 15 GHz.

Integration of heterostructure bipolar transistor and electroabsorption waveguide modulator based on a multifunctional layer design for 1.55 /spl mu/m

An electroabsorption waveguide modulator (EAM) for 1.55 /spl mu/m is embedded into the layer-stack of a heterostructure bipolar transistor (HBT). The collector consists of a complete optical waveguide and enables the monolithic integration of modulators, transistors and also a new merged device to result in a modulator with integrated amplifier. At present this device offers a 3 dB cut-off frequency for optical modulation of 7 GHz and for pure electrical operation cut-off frequencies of f/sub T/ and f/sub max/ both of about 25 GHz.

Parallel Adder Design with Reduced Circuit Complexity Using Resonant Tunneling Transistors and Threshold Logic

Quantum-effect devices utilizing resonant tunneling are promising candidates for future nano-scale integration. Originating from the technological progress of semiconductor technology, circuit architectures with reduced complexity are investigated by exploiting the negative-differential resistance of resonant tunneling devices. In this paper a resonant tunneling device threshold logic family based on the Monostable-Bistable Transition Logic Element (MOBILE) is proposed and applied to different parallel adder designs, such as ripple carry and binary carry lookahead adders. The basic device is a resonant tunneling transistor (RTT) composed of a resonant tunneling diode monolithically integrated on the drain contact layer of a heterostructure field effect transistor. On the circuit level the key components are a programmable NAND/NOR logic gate, threshold logic gates, and parallel counters. The special properties of MOBILE logic gates are considered by a bit-level pipelined circuit style. Experimental results are presented for the NAND/NOR logic gate.

Origin of 1/f noise in InAlAs/InGaAs HEMTs

For some applications (e.g.: mixers, oscillators), the 1/f noise upconversion limits the microwave performances of all kinds of HEMTs. That is why the origin of 1/f noise in HEMTs is highly needed. Previously it has been suggested that the channel is the main 1/f noise source at low drain bias. Recent experiments performed on different HEMTs structures indicated the InAlAs spacer and buffer as sources of 1/f noise. Some of these experiments also pointed to heterointerfaces as sources of 1/f noise. All these experiments quite clearly established the topology of the 1/f noise sources. A step further would be to answer which microscopic mechanism is responsible for the 1/f noise generation in a two-dimensional electron gas (2DEG). The purpose of this work is to identify lattice scattering as the microscopic source of 1/f noise in InAlAs/InGaAs HEMTs.