F. Munoz

A low-power low-voltage OTA-C sinusoidal oscillator with a large tuning range

A new operational transconductance amplifier and capacitor based sinusoidal voltage controlled oscillator is presented. The transconductor uses two cross-coupled class-AB pseudo-differential pairs biased by a flipped voltage follower, and it exhibits a wide transconductance range with low power consumption and high linearity. The oscillator has been fabricated in a standard 0.8-/spl mu/m CMOS process. Experimental results show a frequency tuning range from 1 to 25 MHz. The amplitude is controlled by the transconductor nonlinear characteristic. The circuit is operated at 2-V supply voltage with only 1.58 mW of maximum quiescent power consumption.

Comparison of conventional and new flipped voltage structures with increased input/output signal swing and current sourcing/sinking capabilities

A systematic comparison of flipped voltage followers circuits is presented. Two new versions of the flipped voltage follower are introduced. They are characterized by very low output impedance, high bandwidth speed, wide signal swing. All structures can be easily modified for class AB operation. Simulation results show that the newly introduced structures have optimal characteristics

A Unified Environment for Fault Injection at Any Design Level Based on Emulation

Sensitivity of electronic circuits to radiation effects is an increasing concern in modern designs. As technology scales down, Single Event Upsets (SEUs) are made more frequent and probable, affecting not only space applications, but also applications at earths surface, like automotive applications. Fault injection is a method widely used to evaluate the SEU sensitivity of digital circuits. Among the existing fault injection techniques, those based on FPGA emulation have proven to be the fastest ones. In this paper a unified emulation environment which combines two fault injection techniques based on FPGA emulation is proposed. The new emulation environment provides both, a high speed tool for quick fault detection, and a medium speed tool for in-depth analysis of SEUs propagation. The experiments presented here show that the two techniques can be successfully applied in a complementary manner.

A 1.2-V 140-nW 10-bit Sigma–Delta Modulator for Electroencephalogram Applications

This paper presents a second-order Sigma-Delta modulator for electroencephalogram applications with 10 bits of resolution, 1.2 V of supply voltage, and only 140 nW of power consumption over a bandwidth of 25 Hz. Low-voltage operation has been achieved using quasi-floating-gate-based circuits. The use of a new class-AB operational amplifier in weak inversion allows very low power consumption. Experimental results show an energy efficiency of 1.6 pJ per quantization level, making it the most energy-efficient converter reported to date in the very low signal bandwidth range.

Radiation Environment Emulation for VLSI Designs: A Low Cost Platform based on Xilinx FPGA's

As technology shrinks, critical industrial applications have to be designed with special care. VLSI circuits become more sensitive to ambient radiation: it affects to the internal structures, combinational or sequential elements. The effects, known as single event effects (SEEs), are modeled as spontaneous logical changes in a running netlist. They can be mitigated at netlist design level by means of inserting massive redundancy logic in the IC memory elements, as well as designing robust deadlock-free state machines. Current techniques for the analysis and verification of the protection logic for VLSI are inefficient and expensive, lacking either speed or analysis. This paper presents the FT- As technology shrinks, critical industrial applications have to be designed with special care. VLSI circuits become more sensitive to ambient radiation: it affects to the internal structures, combinational or sequential elements. The effects, known as single event effects (SEEs), are modeled as spontaneous logical changes in a running netlist. They can be mitigated at netlist design level by means of inserting massive redundancy logic in the IC memory elements, as well as designing robust deadlock-free state machines. Current techniques for the analysis and verification of the protection logic for VLSI are inefficient and expensive, lacking either speed or analysis. This paper presents the FT-UNSHADES system. This system is a low cost emulator focused on bit-flip insertion and SEE analysis at hardware speed, based on a Xilinx Virtex-II. Radiation tests are emulated in a highly controlled process, using a non-intrusive method. As a result the system can insert and analyse at least 80 K faults per hour in a system with 2 million test vectors.UNSHADES system. This system is a low cost emulator focused on bit-flip insertion and SEE analysis at hardware speed, based on a Xilinx Virtex-II. Radiation tests are emulated in a highly controlled process, using a non-intrusive method. As a result the system can insert and analyse at least 80 K faults per hour in a system with 2 million test vectors.

Two new VHF tunable CMOS low-voltage linear transconductors and their application to HF GM-C filter design

Two new CMOS low-voltage linear transconductors for High Frequency (HF) applications are presented. They use tunable floating voltage sources between the input and the transistor gates of each inverter that forms the transconductor proposed by Nauta (1992). Two implementations of the floating batteries are presented. The proposed transconductors operate under constant low voltage supply as low as 1.2 V and transconductance and output resistance are independently tunable. It is suitable to be used in HF continuous time filters with programmable center frequency and quality factor. To this end, simulation results of a 10.7 MHz band-pass g/sub m/-C filter operating at a voltage supply of 1.5 V and large input swing are presented.

A Very Linear Low-Pass Filter with Automatic Frequency Tuning

A Gm-C third-order Chebyshev low-pass filter with a novel switched capacitor frequency tuning technique for a zero-IF Bluetooth receiver has been designed. The frequency tuning scheme is simpler and has more relaxed specifications than conventional ones. Furthermore, a highly linear pseudo-differential transconductor with a compact feedback loop able to operate with low supply voltage has been used. This control loop holds the input transistors in triode region and provides high output resistance, keeping high linearity in a wide range of transconductance. The filter bandwidth is 0.5 MHz and the overall scheme consumes 1.1 mA from a 1.8-V supply. The measured third-order intermodulation (IM3) distortion of the filter for a 1 Vpp two-tone signal centered at 300 kHz is -65 dB.

Low-power low-voltage class-AB linear OTA for HF filters with a large tuning range

This letter presents a new low-voltage class-AB differential linear OTA. The proposed transconductor uses a novel scheme based on two cross-coupled class-AB pseudo-differential pairs biased by a Flipped Voltage Follower [1]. The transconductor has been designed using a 0.8 μm CMOS technology to operate at 2 V supply voltage with only 260 μW of quiescent power consumption. Simulation results show 90 MHz bandwidth with more than two decades of transconductance tuning range.

Low Voltage Class AB Output Stage for CMOS Op-Amps Using Multiple Input Floating Gate Transistors

A new class AB output stage for CMOS op-amps is proposed with simple and accurate quiescent current control using floating gate transistors. The proposed stage can be operated with a supply voltage close to a transistors threshold voltage. Experimental results are provided showing a 15 MHz gain-bandwidth product when it is used as the second stage of an op-amp with 1.5 V supply voltage in a standard 0.8 μm CMOS technology.

Data Acquisition System Based on Subsampling for Testing Wideband Multistandard Receivers

In this paper, a data acquisition module meeting the specifications of a wideband multistandard receiver test system is presented. It provides a high resolution over large bandwidth with only a low-jitter wideband sample-and-hold and an intermediate frequency analog-to-digital converter by means of subsampling. Using commercial devices on a multilayer printed circuit board, experimental results showed more than a resolution of 8 b for a signal bandwidth of 20 MHz with a center frequency of up to 4 GHz, which is enough to cover the requirements of test systems for most of present wireless communication standards.