Fernando Muñoz Chavero

Very low-voltage analog signal processing based on quasi-floating gate transistors

A novel design principle for very low-voltage analog signal processing in CMOS technologies is presented. It is based on the use of quasi-floating gate (QFG) MOS transistors. Similar to multiple input floating gate (MIFG) MOS transistors, a weighted averaging of the inputs accurately controlled by capacitance ratios can be obtained, which is the basic operating principle. Nevertheless, issues often encountered in MIFG structures, such as the initial charge trapped in the floating gates or the gain-bandwidth product degradation, are not present in QFG configurations. Several CMOS circuit realizations using open- and closed-loop topologies, have been designed. They include analog switches, mixers, programmable-gain amplifiers, track and hold circuits, and digital-to-analog converters. All these circuits have been experimentally verified, confirming the usefulness of the proposed technique for very low-voltage applications.

A continuous-time /spl Sigma//spl Delta/ ADC with increased immunity to interferers

Receivers are being digitized in a quest for flexibility. Analog filters and programmable gain stages are being exchanged for digital processing at the price of a very challenging ADC. This paper presents an alternative solution where the filter and programmable gain functionality is integrated into a /spl Sigma//spl Delta/ ADC. The novel filtering ADC is realized by adding a high-pass feedback path to a conventional /spl Sigma//spl Delta/ ADC while a compensating low-pass filter in the forward path maintains stability. As such, the ADC becomes highly immune to interferers even if they exceed the maximum allowable input level for the wanted channel. As a consequence, the ADC input range can be programmed dynamically to the level of the wanted signal only. This results in an input-referred dynamic range of 89 dB in 1-MHz bandwidth and an intentionally moderate output signal-to-noise-and-distortion ratio of 46-59 dB (depending on the programmed gain). The merged functionality enables a better overall power/performance balance for the receiver baseband. The design consumes less than 2 mW and active area is 0.14 mm/sup 2/ in a 0.18-/spl mu/m digital CMOS technology.

Subsampling Receivers with Applications to Software Defined Radio Systems

There are currently a large number of different communication standards, due to the widespread acceptance of wireless technologies. As a consequence, there is a tendency to design transceivers for multiple standards [1-8]. A similar problem arises in the test industry, where providers of testing and certification services to the wireless communication industry need multi-standard receivers, in order to reduce the cost in testing equipment.

Design of Dual-Band Multistandard Subsampling Receivers for Optimal SNDR in Nonlinear and Interfering Environments

This paper presents a design approach to concurrent dual-band subsampling receivers for wireless certification and testing interoperability. The proposed technique allows the optimization of the signal-to-noise and distortion ratio and improves the subsampling receiver performance, usually limited by the clock jitter and folded thermal noise effects. Furthermore, the proposed design approach considers the presence of spurious nonlinear distortions and/or interferers signals, which can alias over the desired signal bandwidth and reduce the valid subsampling frequency ranges. The proposed architecture allows seamless reconfigurability for simultaneous multistandard signal reception, reducing the costs in test equipment. As a validation of the proposed design methodology, a dual-band multiple clocking subsampling receiver operating in a nonlinear environment is developed, and an algorithm to find the optimal frequency plan is proposed and validated experimentally.

Linear Tunable Analog Front-End Electronics for Silicon Charged-Particle Detectors

A linear front-end electronic system based on a high-speed charge sensitive amplifier and a tunable shaping amplifier suitable for silicon detectors has been presented. The designed charge sensitive amplifier features simplicity and compactness. It is based on the combination of a low-noise field-effect transistor input device and a current feedback opamp ensuring high frequency and small rise time. The circuit provides both an energy signal and a timing signal. The shaping amplifier is a fifth-order complex filter based on an opamp-RC topology providing a nearly Gaussian response. The shaper also includes a pole-zero cancellation circuit and a base line restorer to preclude the pileup of subsequent input signals. A control system has been developed to adjust the main parameters of the channel. The designed readout channel has been optimized for a medium energy range up to 50 MeV coupled to silicon detectors up to 100 pF. Its feasibility for nuclear physics applications has been experimentally validated.

Passive RFID-Based Inventory of Traffic Signs on Roads and Urban Environments

This paper presents a system with location functionalities for the inventory of traffic signs based on passive RFID technology. The proposed system simplifies the current video-based techniques, whose requirements regarding visibility are difficult to meet in some scenarios, such as dense urban areas. In addition, the system can be easily extended to consider any other street facilities, such as dumpsters or traffic lights. Furthermore, the system can perform the inventory process at night and at a vehicle’s usual speed, thus avoiding interfering with the normal traffic flow of the road. Moreover, the proposed system exploits the benefits of the passive RFID technologies over active RFID, which are typically employed on inventory and vehicular routing applications. Since the performance of passive RFID is not obvious for the required distance ranges on these in-motion scenarios, this paper, as its main contribution, addresses the problem in two different ways, on the one hand theoretically, presenting a radio wave propagation model at theoretical and simulation level for these scenarios; and on the other hand experimentally, comparing passive and active RFID alternatives regarding costs, power consumption, distance ranges, collision problems, and ease of reconfiguration. Finally, the performance of the proposed on-board system is experimentally validated, testing its capabilities for inventory purposes.

Intelligent Containers Based on a Low-Power Sensor Network and a Non-Invasive Acquisition System for Management and Tracking of Goods

This paper presents a prototype of a system for intermodal freight transport with electronics management of goods. The system is based on low-power wireless networks connecting intelligent containers. The proposed intelligent container can be configured with different types of sensors inside. With the objective to preserve the sealing of the container, the data collected inside the container are transmitted through a metal communication channel based on ultrasonic techniques. Outside the container, the implemented system is composed by a long range and low-power scalable wireless network. Finally, a management subsystem has been designed for tracking, monitoring, and alarm reporting.