Ronny Henker

Effective 100 Gb/s IM/DD 850-nm Multi- and Single-Mode VCSEL Transmission Through OM4 MMF

To cope with the ever increasing data traffic demands in modern data centers, new approaches and technologies must be explored. Short range optical data links play a key role in this scenario, enabling very high speed data rate links. Recently, great research efforts are being made to improve the performance of vertical-cavity surface-emitting lasers (VCSELs) based transmission links, which constitute a cost-effective solution desirable for massive deployments. In this paper, we experimentally demonstrate intensity-modulation direct-detection transmissions with a data rate of 107.5 Gb/s over 10 m of OM4 multimode fiber (MMF) using a multimode VCSEL at 850 nm, and up to 100 m of OM4 MMF using a single-mode VCSEL at 850 nm. Measured bit error rates were below 7% overhead forward error correction limit of 3.8e−03, thus, achieving an effective bit rate of 100.5 Gb/s. These successful transmissions were achieved by means of the multiband approach of carrierless amplitude phase modulation.

New design approach of vertical inductors for high-frequency integrated circuits

This paper presents a new method for the design of inductors in high-frequency integrated circuits. In order to increase the inductance per unit of area more than one metal layer is used and the spiral inductor is oriented in the vertical instead of the horizontal plane. The inductor is designed in 130 nm BiCMOS technology using five metal layers. Simulations were performed via Sonnet 3D EM software. The inductance at low frequencies was verified with the Greenhouse method using Grover formulas. Good agreement between simulations and analytical calculations was found when the inductance length and metal width was changed. As a first proof of concept, an inductor of 340 pH with self-resonance frequency of 51.7 GHz and a quality factor of 3.14 at 26 GHz was designed, which is well suited for peaking purposes. The designed inductor shows an inductance per unit of area of 377 nH/mm2. This is a significant improvement compared to planar inductors.

Design of a 56 Gbit/s 4-level pulse-amplitude-modulation inductor-less vertical-cavity surface-emitting laser driver integrated circuit in 130 nm BiCMOS technology

This paper presents the design and analysis of a 4-level pulse-amplitude-modulation (4-PAM) 56 Gbit/s vertical-cavity surface-emitting laser (VCSEL) driver integrated circuit (IC) for short range, high speed and low power optical interconnections. An amplitude modulated signal is necessary to overcome the bottleneck of speed given by the actual VCSELs and decrease the power consumption per bit. A prototype IC is developed in a standard 130 nm BiCMOS technology. The circuit converts two single-ended input signals to a 4-level signal fed to the laser. The driver also provides the DC current and the voltage necessary to bias the VCSEL. The power dissipation of the driver is only 115 mW including both the VCSEL and the 50 Ω input single-to-differential-ended converters. To the authors knowledge this is the first 56 Gbit/s 4-PAM laser driver implemented in silicon with a power dissipation per data-rate (DR) of 2.05 mW/Gbit/s including the VCSEL making it the most power efficient, 56 Gbit/s, common cathode laser driver. The active area occupies 0.056 mm 2 . The small signal bandwidths are 49 GHz for the high and 43 GHz for the low amplitude amplification path, when the VCSEL is not connected. The bit error rate was tested electrically showing and error free connection at 28 GBaud/s.

Performance of step index multimode waveguides with tuned numerical aperture for on-board optical links

This paper discusses experimental results of optical characterization of low-loss, robust, high-speed optical link basing on step index (SI) polymeric multimode waveguides. In order to enhance the bandwidth of optical waveguides tuning of numerical aperture by material adoption has been implemented. However, trade-off between tolerance requirements, bandwidth and design rules have to be found. In this paper experimental performance evaluation of SI polymeric waveguides by insertion loss measurement, near- and far-field analysis and optical transmission measurements at high data rates will be investigated. The measurement results will be finally analyzed in order to derive design rules for onboard optical interconnects with multi Gbit/s × m performance.

A compact electro-optical VCSEL model for high-speed IC design

This paper presents an accurate yet compact model for vertical cavity surface emitting lasers (VCSEL), which can be extracted from simple DC and small-signal electro-optical measurements. Since VCSELs are the bottleneck of high-speed electro-optical transceivers, the model is essential in the design of high-speed laser drivers. VCSEL rate equations are used to describe the electrical to optical conversion in the laser, while non-linear parasitcs are modelling the VCSEL interface. The model is applied to a commercially available VCSEL and there is an excellent agreement between the simulated and measured eye diagrams at different data rates and bias currents.

The effect of strong equalization in high-speed VCSEL-based optical communications up to 48 Gbit/s

In this paper the design of a VCSEL driver with strong equalization is presented. Unlike other published works the pre-emphasis provided from the proposed driver and the output voltage swing are independently tunable up to the saturation of the output stage (~700 mVpp in 50 Ω load environment). The driver is designed in 130 nm SiGe BiCMOS technology. Thanks to the various bandwidth extension techniques, the electrical data-rate at which the driver can operate is higher than 50 Gbit/s. A wide open optical eye diagram is measured at 48 Gbit/s with a 20 GHz VCSEL. The driver and the VCSEL consume only 188 mW from a dual voltage supply of 2.5 and 3.4 V. To the best of the authors knowledge 3.9 mW/(Gbit/s) is the highest reported energy-efficiency for a common-cathode VCSEL driver with data-rate higher than 40 Gbit/s. Moreover an open eye at 48 Gbit/s is the fastest reported for a common cathode VCSEL driver without pre-emphasis in the receiver.

A high-speed energy-efficient inductor-less transimpedance amplifier with adjustable gain for optical chip-to-chip communication

A high-speed transimpedance amplifier (TIA) with adjustable gain, high gain-bandwidth product, high energy efficiency and low noise is presented. The amplifier is designed in a 0.13μm SiGe BiCMOS technology as part of an integrated receiver front-end. A high transimpedance gain over a large bandwidth is achieved with a low stage count topology and without applying area consuming peaking inductors. Measurements of the fabricated chip show a tunable transimpedance gain between 685Ω and 1793Ω as well as a forward gain between 13.5 dB and 15.7 dB over a bandwidth range from 53.8GHz to 6.8GHz, making the TIA well suited for data rates up to 77Gbit/s. With a power consumption of less than 21.2mW from a 3.3V supply the circuit yields a high energy efficiency of 0.28 pJ/bit requiring a chip area of only 0.163mm2 including pads.

A 50 Gb/s 190 mW Asymmetric 3-Tap FFE VCSEL Driver

This paper describes the design of an energy-efficient vertical-cavity surface-emitting laser (VCSEL) driver circuit implemented in a 130 nm SiGe BiCMOS technology. The driver features a 3-tap feed-forward equalizer where positive and negative peaks are added to the main signal to compensate for the low-pass characteristic of VCSELs. The circuit is also able to generate asymmetric pre-emphasis to counteract the VCSEL nonlinearity. Bonded to an 18 GHz VCSEL, the driver can reach an error-free (bit error rate < 10−12) optical data rate of 50 Gb/s with an horizontal eye opening better than 0.2 unit interval using a 22 GHz photoreceiver without equalization, retiming, and limiting amplifier at the receiver side. At 48 Gb/s, the horizontal eye opening is 0.5 unit interval. The circuit dissipates only 190 mW from a dual supply of 2.5 and 3.3 V, including the VCSEL power. To the best of the authors’ knowledge, this is the fastest common-cathode VCSEL driver with lowest power consumption for data rates higher than 35 Gb/s. Thanks to the active delay line and the application of vertical inductor, the driver is very compact with an active area of only 0.036 mm2 including the inductor.

Tunable broadband integrated circuits for adaptive optical interconnects

To accommodate the growing demand on higher speeds, low latencies and low energy consumption, the interconnections within and between data centers are supposed to be implemented as optical fiber and waveguide interconnects in future. Optical fiber interconnects provide several advantages over their electrical counterparts as they enable higher bandwidth densities and lower losses at high frequencies over distances longer than few centimeters. However, nowadays optical fiber interconnects are usually not very energy-efficient. The systems in optical networks are mostly optimized for running at their peak performance to transmit the information with the highest available error-free data rate. But the work load of a processor system and hence of an optical link is not constant and varies over time due to the demand of the running applications and users. Therefore, optical interconnects consume the same high power at all times even if lower performance is required. In this paper a new method for the tuning of optical interconnects for on-board and board-to-board optical communication is described. In this way the performance of the transceiver systems of the link is adapted to the present transmission workload and link requirements. If for example lower data rates are required, the bandwidth and therefore the power consumption of the systems can be reduced. This tuning is enabled by the integrated circuitry of the optical link. Different methods for such an adaptive tuning are described and several practical examples are reviewed. By using adaptive bandwidth reduction in the circuits, more than 50 % of the consumed power can be saved. These savings can result in tremendous reductions of the carbon footprint and of the operating costs produced by data centers.

A 0.68 pJ/bit inductor-less optical receiver for 20 Gbps with 0.0025 mm2 area in 28 nm CMOS

This paper presents the design, electrical and optical measurements of a receiver for optical communications in 28 nm CMOS. Electrical measurements show an error-free transmission with a bit error rate (BER) of 10-12 up to 20 Gbps. Inductor-less peaking methods are used, thus the circuit is very compact. With only 0.0025 mm2, 13.6 mW power consumption, yielding 0.68 pJ/bit it is one of the smallest and most energy efficient receiver to this date for 20 Gbps data rate (DR). The receiver was bonded to a printed circuit board (PCB) and to a 14 Gbps, 850 nm photo diode. An error-free transmission over the optical link was obtained up to 17 Gbps with an input optical sensitivity of -4.3 dBm. The measured sensitivity at 15 Gbps is just -7.5 dBm and -8.4 dBm for 10 Gbps.