G. Vandersteen

An identification technique for data acquisition characterization in the presence of nonlinear distortions and time base distortions

The nonlinear behavior of data acquisition channels and analog-to-digital converters is often measured using sine-wave measurements. High-frequency sampling scopes also suffer from time base distortions. This implies that the signals are sampled at a nonequidistant time grid. This paper describes a robust and efficient identification technique to characterize acquisition channels which suffer from both nonlinear distortions and/or time base distortions in the presence of both additive and jitter noise. An automatic model selection scheme and the generation of uncertainty bounds are obtained through the statistical properties of the proposed simulator. The applicability of the method is demonstrated on both simulations and measurements of high-frequency sampling scopes.

Analysis and compact behavioral modeling of nonlinear distortion in analog communication circuits

The design of analog front-ends of digital telecommunication transceivers requires mixed-signal simulations at the architectural level. The nonlinear nature of the analog front-end blocks is a complication for their modeling at the architectural level, especially when the nonlinear behavior is frequency dependent. This paper describes an analysis and modeling method based on Volterra theory. The method derives bottom-up models of nonlinear analog continuous-time circuits. These behavioral models predict the dominant nonlinear effects using a composition of linear transfer functions and multiplications. This makes it possible to accurately model frequency dependencies and to gain insight into the dominant nonlinear sources of the circuit. The basic models are afterwards described using its multicarrier complex low-pass representation to enable their efficient cosimulation with the digital circuits in a dataflow simulation environment. The multicarrier representation is a direct extension of the classically used complex low-pass equivalent models, which considers the modulation of a single carrier only. The accuracy of the multicarrier representation is higher than classical complex low-pass equivalent models since out-of-band nonlinear distortion is taken into account. The main advantage of the proposed technique is that it yields both insight in the nonlinear behavior at the circuit level and that it provides an important gain in simulation efficiency of RF integrated circuits at the system level. Both aspects are demonstrated on a 5-GHz WLAN design.

Maximum likelihood estimator for jitter noise models [HF sampling scopes]

High-frequency sampling scopes suffer from both additive noise and time jitter. The classical techniques for identifying the additive noise and time jitter noise are based on linear least squares (LS) estimators. This work derives a maximum likelihood (ML) estimator and compares its performance with the LS estimator. Simulation results show the gain in efficiency of the proposed method.

RF performance degradation due to coupling of digital switching noise in lightly doped substrates

Coupling of digital switching noise to the silicon substrate can severely degrade the analog and RF performance in single-chip transceivers. To predict the degradation of the performance of RF circuits, modeling of the impact of substrate noise is absolutely necessary. Using measurements, this impact is modeled by the cascade of an attenuation through the substrate from the source of substrate noise to the RF circuit and the propagation through the RF circuit to its output. This approach has been validated with measurements on a 0.25 /spl mu/m CMOS low-noise amplifier (LNA) and reveals insight in the mechanism of impact of substrate noise on RF circuits. In addition, impact of a real digital circuit is measured on a 0.18 /spl mu/m differential CMOS LNA.

Experimental characterization of operational amplifiers: a system identification approach

Absfrocf Using special designed broadband periodic random excifarion SigMk, the open loop gain, and fhe common mode and power supply rejection ratios of operational amplifers are measured and modelled. The proposed modelling technique (i) fakes info account the measurement uncertainty and fhe nonlinear distortions, (ii) gives informntion about possible unmodelled dynamics, (iii) detects, quantifis and c&ss

Experimental Analysis of the Coupling Mechanisms Between a 4 GHz PPA and a 5–7 GHz

ies the nonlinear distonions, and (iv) provides opamp paramelers (time constants, gain-bandwidth producf, ... ) with confulence bounds. The approach is suitable for the experimenlal characterization of operational amplsers as well as the fast evaluarion of new operational amplifiers designs using network simulators.

LC

The coupling of the transmitted radio-frequency (RF) signal of the power amplifier (PA) in the sensitive voltage-controlled oscillator (VCO) remains a major problem for system-on-chip (SoC) design. Coupling between these two circuits may cause malfunctioning of the system. This paper analyzes the different coupling mechanisms between a 4 GHz prepower amplifier (PPA) and a 5-7 GHz LC-VCO designed in 0.13 mum technology. Different experiments are carried out to reveal the dominant coupling mechanisms. Insight into these mechanisms leads to the proposal of proper countermeasures.

-VCO

Analog and RF circuit performance in single-chip transceivers can severely suffer from coupling of digital switching noise to the silicon substrate. To predict this performance degradation, a deeper understanding of the impact of substrate noise is absolutely necessary. Using measurements, this impact is studied as the cascade of attenuation through the substrate from the source of substrate noise to the RF circuit and the propagation through the RF circuit to its output. This approach has been validated with measurements on a 0.25 /spl mu/m and a 0.18 /spl mu/m CMOS low-noise amplifier (LNA) and reveals insight in the mechanisms of impact of substrate noise on RF circuits. In addition, impact of a real digital circuit is measured on a 0.18 /spl mu/m differential CMOS LNA.

Characterization of substrate noise impact on RF CMOS integrated circuits in lightly doped substrates

The coupling of the transmitted RF signal of the power amplifier (PA) into the sensitive voltage controlled oscillator (VCO) of a transceiver can cause failure of the RFIC. It is not obvious for the designer to identify which coupling mechanism can be held responsible for the degradation of the VCO. Thus it remains an open problem to decide which appropriate countermeasure should be taken. Different experiments are carried out on a 0.13 mum CMOS 4 GHz PPA and a 5-7 GHz LC-VCO to gain insight in the different coupling mechanisms.

Study of the different coupling mechanisms between a 4 GHz PPA and a 5–7 GHz LC-VCO

In this paper a methodology is described for architectural exploration of mixed-signal front-ends of transceivers for digital telecommunications. The methodology couples high-level simulations with high-level power estimators. In this way, both the performance (e.g. signal-to-noise-ratio) and the power consumption can be estimated at a high level, prior to implementation. The approach is illustrated with an architectural study of front-ends for upstream CATV modems.