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Dive into the research topics where Gabriel J. Capella is active.

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Featured researches published by Gabriel J. Capella.


IEEE Transactions on Industrial Electronics | 2015

Current-Balancing Technique for Interleaved Voltage Source Inverters With Magnetically Coupled Legs Connected in Parallel

Gabriel J. Capella; Josep Pou; Salvador Ceballos; Jordi Zaragoza; Vassilios G. Agelidis

Connecting legs in parallel in a voltage source inverter is a way to increase the output current and, thus, its rated power. The connection can be made using either coupled or uncoupled inductors, and achieving an even contribution to the output current from all the legs is a crucial issue. Circulating currents produce additional losses and stress to the power devices of the converter. Therefore, they should be controlled and minimized. An efficient technique to attain such balance when coupled inductors are used is presented in this paper. The proposed technique can also be used when the inductors are uncoupled, since it is a particular case where the coupling coefficients are zero. This technique does not include proportional-integral controllers and does not require any parameter tuning either. The exact control action needed to reach current balance is straightforwardly calculated and applied. Experimental results are shown in this paper to verify the efficiency of the proposed balancing method.


IEEE Transactions on Power Electronics | 2015

Enhanced Phase-Shifted PWM Carrier Disposition for Interleaved Voltage-Source Inverters

Gabriel J. Capella; Josep Pou; Salvador Ceballos; Georgios Konstantinou; Jordi Zaragoza; Vassilios G. Agelidis

This letter presents a novel implementation of pulse width modulation that improves the quality of the line-to-line output voltages in interleaved multiphase voltage-source inverters (VSIs). In multiphase VSIs with n interleaved parallel-connected legs, the best single-phase output voltage is achieved when the carriers are evenly phase shifted. However, switching among nonadjacent levels can be observed at regular intervals in the line-to-line voltages, causing bad harmonic performance. With the proposed method, switching in the line-to-line voltages happens exclusively between adjacent levels. The modulator utilizes two sets of n evenly phase-shifted carriers that are dynamically allocated. Because of its generality, the proposed implementation is valid for any number of phases and any number of legs in parallel. A MATLAB/Simulink model has been set up for simulation purposes. Selected experimental results obtained from a three-phase VSI made up with two and three legs in parallel per phase are reported, confirming the enhancement attained with the proposed implementation.


IEEE Transactions on Power Electronics | 2015

Single-Carrier Phase-Disposition PWM Implementation for Multilevel Flying Capacitor Converters

Amer M. Y. M. Ghias; Josep Pou; Gabriel J. Capella; Vassilios G. Agelidis; Ricardo P. Aguilera; Thierry Meynard

This letter proposes a new implementation of phase-disposition pulse-width modulation (PD-PWM) for multilevel flying capacitor (FC) converters using a single triangular carrier. The proposed implementation is much simpler than conventional PD-PWM techniques based on multiple trapezoidal-shaped carriers, generates the same results as far as natural capacitor voltage balance is concerned and offers better quality line-to-line voltages when compared to phase-shifted PWM. The proposed algorithm is based on reshaping the reference signal to fit within the range of a single carrier and assigning each crossing of the reference signal with the carrier to a particular pair of switches at any time. The proposed algorithm is suitable for digital implementation taking maximum benefit from the PWM units available in the processor. Simulation and experimental results are presented from the five-level FC converter to verify the proposed PD-PWM implementation.


international symposium on industrial electronics | 2013

Control strategy to balance operation of parallel connected legs of modular multilevel converters

Josep Pou; Salvador Ceballos; Georgios Konstantinou; Gabriel J. Capella; Vassilios G. Agelidis

Connecting legs of modular multilevel converters (MMCs) in parallel can assist an MMC-based high-voltage direct current (HVDC) to increase its current ratings and hence overall power handling capability. Consequently, each phase of the MMC would be integrated by several legs or sets of upper and lower arms (ULAs). This paper proposes a current control strategy for each ULA in order to ensure balanced current sharing among them. In addition, each ULA has its own circulating current control that follows a reference obtained from the instantaneous magnitudes of the output current and the modulation signal. All the proposed control actuations do not distort the phase output voltage of the MMC which follows the reference voltage. The performance of the proposed control strategies is evaluated by simulation studies in the PLECS Blockset under MATLAB/Simulink software platform.


2009 Compatibility and Power Electronics | 2009

On the use of sun trackers to improve maximum power point tracking controllers applied to photovoltaic systems

Carles Jaen; Josep Pou; Gabriel J. Capella; Antoni Arias; M. Lamich

Nowadays power supply systems based on photovoltaic cells have two main drawbacks, even the primary energy is free and renewable. They are: production cost and efficiency. In order to increase their efficiency, it should be interesting that the energy transfer between cells and load was done at maximum level. In this paper the use of a sun tracker system is presented as an additional improvement applied to a photovoltaic installation that works under a maximum power point tracking (MPPT) control technique. A 50W-prototype has been assembled. Some experimental results are also included in order to validate the whole system.


Epe Journal | 2011

Current Balancing Strategy for Interleaved Voltage Source Inverters

Josep Pou; Jordi Zaragoza; Gabriel J. Capella; Igor Gabiola; Salvador Ceballos; Eider Robles

Abstract The parallel connection of inverter legs is a way to increase the output currents and thus, the converter rated power. The connection is made by inductors and a critical issue is to achieve balanced currents among the legs. Circulating currents produce additional losses and stress to the power devices of the converter. Therefore, they should be controlled and minimized. An efficient technique to achieve such balance is presented in this paper. The proposed strategy does not include proportional-integral (PI) controllers and parameter tuning is not required. The exact control action to achieve current balance is straightforward calculated and applied. Simulation and experimental results are shown in this paper to verify the efficiency of the proposed balancing method.


IEEE Transactions on Power Electronics | 2016

On Improving Phase-Shifted PWM for Flying Capacitor Multilevel Converters

Amer M. Y. M. Ghias; Josep Pou; Gabriel J. Capella; Pablo Acuna; Vassilios G. Agelidis

This letter proposes a phase-shifted pulse-width modulation (PS-PWM) technique for the flying capacitor (FC) multilevel converter that improves the quality of the line-to-line voltages. In traditional PS-PWM, the line-to-line voltages include intervals that switch between nonadjacent voltage levels, which deteriorates the harmonic performance. The proposed PS-PWM constantly achieves line-to-line voltages with switching transitions between two adjacent levels. The proposed modulation technique is implemented using two sets of n evenly phase-shifted carriers that are alternatively applied depending on the instantaneous value of the reference signal of each phase-leg. Furthermore, it can be implemented in FC multilevel converters with any number of levels while maintaining natural capacitor voltage balance. Experimental results from a four-level FC converter prototype are presented.


international conference on industrial technology | 2015

Reducing circulating currents in interleaved converter legs under selective harmonic elimination pulse-width modulation

Georgios Konstantinou; Josep Pou; Gabriel J. Capella; Salvador Ceballos; Vassilios G. Agelidis

Interleaving of voltage source converter legs enables higher output currents per phase, effectively increasing the power rating without increasing semiconductor ratings. Different switching patterns between the converter legs increase the number of Thevenin output voltage levels and, hence, the quality of the waveform but also generate circulating currents within one phase. This paper proposes a controller for interleaved converter legs under selective harmonic elimination pulse-width modulation (SHE-PWM) aimed at reducing the circulating current within the legs of each phase. The controller is used in combination with optimally selected SHE-PWM patterns to minimise the peak value of the circulating current. The proposed controller is applied in two interleaved three-level active neutral-point-clamped converters and simulation results demonstrate their performance.


IEEE Transactions on Industrial Electronics | 2016

Interleaved Operation of Three-Level Neutral Point Clamped Converter Legs and Reduction of Circulating Currents Under SHE-PWM

Georgios Konstantinou; Josep Pou; Gabriel J. Capella; Kejian Song; Salvador Ceballos; Vassilios G. Agelidis

Interleaving of voltage-source converter (VSC) legs enables higher output currents per phase, effectively increasing the power rating without increasing semiconductor ratings. However, the interleaved operation results in circulating currents between each phase converter legs as well as a zero-sequence circulating current (ZSCC), which become quite prominent when the converters operate with low switching frequencies. This paper demonstrates the interleaved operation of three-level converters under selective harmonic elimination pulsewidth modulation (SHE-PWM). A controller for the circulating current within the legs of each phase is also proposed. The controller is used in combination with optimally selected SHE-PWM patterns to generate the maximum number of voltage levels and minimize the peak value of the circulating current. Simulation and experimental results show the interleaved operation and the effect of SHE-PWM pattern selection in the overall system.


IEEE Transactions on Industrial Electronics | 2018

Single-Carrier Phase-Disposition PWM Techniques for Multiple Interleaved Voltage-Source Converter Legs

Georgios Konstantinou; Gabriel J. Capella; Josep Pou; Salvador Ceballos

Interleaved converter legs are typically modulated with individual carriers per leg and phase-shifted pulse width modulation (PS-PWM) as it facilitates current balancing amongst the legs. Phase-disposition PWM (PD-PWM), despite the better harmonic performance, cannot be directly used due to the resulting current imbalance that may damage the converter. This paper addresses the current sharing issue and proposes a sorting algorithm implementation that enables single-carrier PD-PWM technique for interleaved two-level converter legs. An extension of the proposed algorithm through a switching state feedback loop, limiting the average switching frequency, is also developed. In both cases, the output current is of high quality and shared amongst the phase-legs, while the deviation between the phase-leg currents is well regulated. Simulation results demonstrate the general function of method for multiple interleaved legs as well as its current sharing capabilities for high-power applications. Experimental results from a low-power laboratory prototype validate the operation of the proposed approach.

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Salvador Ceballos

Polytechnic University of Catalonia

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Josep Pou

Nanyang Technological University

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Vassilios G. Agelidis

University of New South Wales

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Georgios Konstantinou

University of New South Wales

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Jordi Zaragoza

Polytechnic University of Catalonia

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Igor Gabiola

Polytechnic University of Catalonia

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Josep Pou

Nanyang Technological University

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Eider Robles

University of the Basque Country

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Josep Pou

Nanyang Technological University

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