Igor Gabiola

Three-Level Converter Topologies With Switch Breakdown Fault-Tolerance Capability

This paper presents some modified topologies of the neutral-point-clamped converter. In all of them, the main change consists of adding a fourth leg, which is based on the flying-capacitor converter structure. The aim of this additional leg is to provide the converter with fault tolerance. Furthermore, during normal operation mode, this leg is able to provide a stiff neutral voltage. Consequently, the low-frequency voltage oscillations that appear at the neutral point of the standard three-level topology in some operating conditions no longer exist. As a result, the modulation strategy of the three main legs of the converter does not have to take care of voltage balance, and it can be designed to either achieve optimal output voltage spectra or improve the efficiency of the converter. Simulation and experimental results are presented to show the viability of this approach both under normal operation mode and in the event of faults.

Fault-Tolerant Multilevel Converter Topology

This paper presents a modified topology of the neutral-point-clamped converter. The main change consists on adding a fourth leg, which is based on the flying-capacitor converter structure. The aim of this additional leg is to provide fault tolerance to the converter. Furthermore, during normal operation mode, this leg is able to provide a stiff neutral voltage. Consequently, the low-frequency voltage oscillations that appear in the neutral point of the standard three-level topology for some operation conditions no longer exist. As a result, the modulation strategy of the three main legs of the converter does not have to take care of voltage balance, and it can be design to achieve optimal output voltage waveforms, as well as to improve efficiency of the converter. Some simulation results are presented to show viability of this approach under both, normal operation mode and fault event. Experimental results are expected to include in the final paper.

SiC and Si transistors comparison in boost converter

Development of new wide band gap (WBG) power devices, and among them, of Silicon Carbide (SiC) power devices, has been an active field of research during the last years. Potential advantages SiC devices over their Si counterparts include a significantly higher breakdown field, higher operating temperatures as well as higher switching frequencies. However, manufacturing of SiC power devices is not a mature technology yet, their performance being far from their potential limits. A comparison between SiC and Silicon (Si) power devices is presented in this paper. Three different power devices are analyzed, with the aim of verifying the theoretical improvement in the performance of SiC over Si transistors: SiC JFET, SiC MOSFET and Si IGBT. A boost DC to DC converter topology will be used for this purpose, the European Efficiency being used as a figure of merit to evaluate the performance of each semiconductor. An input voltage varying from 250 V to 500 V, an output voltage of 600 V and 3 kW of nominal output power has been developed and tested.

Grid synchronization method based on a quasi-ideal low-pass filter stage and a phase-locked loop

This paper proposes a new phase-locked loop (PLL) scheme for detection of the positive sequence in three-phase systems. The scheme includes the use of the Park transformation and moving average filters (MAF). Performance of the MAF is mathematically analyzed and represented in Bode diagrams. The analysis allows proper selection of the optimal filterpsilas window width for its application in d-q transformed variables. The proposed detector scheme allows fast detection of the grid voltage positive sequence (within one grid voltage cycle). The MAF completely eliminates any oscillation multiple of the frequency for what it is designed. Thus, this algorithm is not affected by the presence of imbalances or harmonics in the electrical grid. Furthermore, although it is designed to operate under constant frequency, it can also operate properly well in the presence of small grid frequency variations. Performance of the entire PLL-based detector is verified through simulation and experiment. It shows very good performance under several extreme grid voltage conditions.

Current Balancing Strategy for Interleaved Voltage Source Inverters

Abstract The parallel connection of inverter legs is a way to increase the output currents and thus, the converter rated power. The connection is made by inductors and a critical issue is to achieve balanced currents among the legs. Circulating currents produce additional losses and stress to the power devices of the converter. Therefore, they should be controlled and minimized. An efficient technique to achieve such balance is presented in this paper. The proposed strategy does not include proportional-integral (PI) controllers and parameter tuning is not required. The exact control action to achieve current balance is straightforward calculated and applied. Simulation and experimental results are shown in this paper to verify the efficiency of the proposed balancing method.

Efficient Modulation Technique for a Four-Leg Fault-Tolerant Neutral-Point-Clamped Inverter

This paper presents a new low-loss modulation technique for the hybrid three-level four-leg converter. The total losses of the converter are reduced by about 18% on average compared to the standard three-leg neutral-point-clamped converter. Furthermore, the low-frequency voltage oscillation in the neutral point is completely cancelled, and the maximum benefit of the dc-link voltage is obtained. All these facts, together with the fault-tolerant ability due to the fourth leg, make this topology very interesting for applications such as wind generation, in which it is important to maximize efficiency and reliability. Some experimental results confirm the good performance of the proposed modulation technique.

Grid sequence detector based on a stationary reference frame

This paper proposes a new three-phase positive sequence detector. The scheme is based on a stationary reference frame and a Moving Average Filter (MAF) that guarantees the complete cancellation of harmonics and grid imbalances. The performance of the MAF is mathematically analyzed and a proper selection of the optimal filters window width is realized. The proposed detector operates in open loop and there is no PI controller to be tuned. Thus, the dynamic response and simplicity is improved compared to other solutions. Performance of the proposed detector is verified through simulation and experiment. It shows very good performance under extreme grid voltage conditions, allowing fast detection of the grid voltage positive sequence (within one grid voltage cycle).

Amplitude control of the neutral-point voltage oscillations in the three-level converter

This paper presents a control method to regulate the amplitude of the voltage oscillations that appear in the neutral-point of the three-level diode-clamped converter for some operating conditions. The control is applied to the hybrid modulation technique, which is based on combining two modulation techniques. One of them is based on two modulation signals per phase, and can remove completely the low-frequency voltage oscillations on the neutral point. However, such a modulation strategy has an important drawback; it increases significantly switching losses on the converter. The hybrid modulation used here combines such a modulation with sinusoidal PWM. The main characteristic of this hybrid modulation is the capacity to reduce switching losses at the cost of having some low-frequency voltage oscillations on the neutral point. The amplitude of these oscillations can be regulated thanks to the proposed controller, which defines the exact degree of mixture between the two modulation strategies. Some simulation and experimental results are presented in this paper.

Experimental validation of multilevel converters for variable speed wind turbines

Wind energy is undergoing a rapid development in size and capacity. Multilevel converters show interesting advantages in this field, such as high efficiency and low harmonic distortion. This work is focused on the analysis of these two features offering experimental results which verify the improvement of this kind of converters on the traditional two level topologies. Finally, we describe an experimental test bench where we intend to continue the validation of other features of multilevel converters such as performance under voltage sags and wind speed variations

Positive-sequence grid voltage detector for distributed generation systems with no tuning requirements

This paper proposes a three-phase positive sequence detector that does not require any parameter to be adjusted. It operates in open loop and there is not any PI controller that needs to be tuned. The scheme includes the use of the Park transformation and moving average filters. Performance of the moving average filter is mathematically analyzed and represented in a Bode diagram. The analysis allows proper selection of the optimal filterpsilas window width for its application in d-q transformed variables. The proposed detector scheme allows fast detection of the grid voltage positive sequence. The MAF completely eliminates any oscillation multiple of the frequency for what it is designed. Thus, this algorithm is not affected by the presence of imbalances or harmonics in the electrical grid. The proposed positive-sequence detector is verified through simulation and experiment. It shows very good performance even under extreme grid voltage conditions.