Jordi Zaragoza
Polytechnic University of Catalonia
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Publication
Featured researches published by Jordi Zaragoza.
IEEE Transactions on Power Electronics | 2012
Josep Pou; Jordi Zaragoza; Salvador Ceballos; Maryam Saeedifard; Dushan Boroyevich
Performance of a carrier-based pulsewidth modulation (CB-PWM) strategy can be improved by the inclusion of a zero-sequence voltage in the modulation-reference signal. This paper proposes a new CB-PWM strategy for a three-level neutral-point-clamped (NPC) converter, which is based on a zero-sequence voltage injection. By inclusion of the zero-sequence voltage, the sinusoidal-modulation reference is modified to 1) carry out the voltage-balancing task of the dc-link capacitors, with no additional control effort, 2) reduce the switching losses, and 3) reduce the low-frequency voltage oscillations of the neutral point. The proposed strategy is an alternative approach to the nearest three-vector (NTV) space-vector modulation (SVM) strategy and is obtained by the analysis of the NTV-SVM strategy and establishing a correlation between the NTV-SVM and the CB-PWM strategies. The salient features of the proposed scheme, as compared with the NTV-SVM strategy, are: 1) its reduced computational processing time which is attractive for digital implementation and 2) its reduced switching losses. Compared with the existing CB-PWM strategies, the proposed strategy offers 1) capability to balance the capacitor voltages and reduce the NP voltage oscillations and 2) reduced switching losses. Performance of the proposed CB-PWM strategy for a three-level NPC converter based on time-domain simulation studies in the MATLAB/SIMULINK environment is evaluated and also experimentally verified.
IEEE Transactions on Industrial Electronics | 2007
Josep Pou; Jordi Zaragoza; Pedro Rodriguez; Salvador Ceballos; Vicenc Sala; Rolando Burgos; Dushan Boroyevich
This paper presents a novel modulation strategy for a neutral-point-clamped converter. This strategy overcomes one of the main problems of this converter, which is the low-frequency voltage oscillation that appears in the neutral point under some operating conditions. The proposed modulation strategy can completely remove this oscillation for all the operating points and for any kind of loads, even unbalanced and nonlinear loads. The algorithm is based on a carrier-based pulsewidth modulation. Nevertheless, it can generate the maximum output-voltage amplitudes that are attainable under linear modulation, such as space-vector modulation. Furthermore, this technique can be implemented with a very simple algorithm and, hence, can be processed very quickly. The only drawback of this strategy is that the switching frequencies of the devices are one third higher than those of standard sinusoidal pulsewidth modulation. A control loop for balancing the voltages on the dc-link capacitors is also proposed. This balancing strategy is designed, so that it does not further increase the switching frequencies of the devices when it is applied to the converter. The proposed modulation technique is verified by simulation and experiment.
IEEE Transactions on Industrial Electronics | 2009
Jordi Zaragoza; Josep Pou; Salvador Ceballos; Eider Robles; Carles Jaen; Montse Corbalán
This paper presents an optimal voltage-balancing compensator for a specific modulation technique applied to a neutral-point-clamped converter. The technique uses two modulation signals per phase, and it is called double-signal pulsewidth modulation. It completely eliminates low-frequency oscillations in the neutral-point voltage. However, it does not provide natural voltage balancing; therefore, a compensation loop is required. The proposed control generates a feedback compensation signal that correctly modifies the three-phase modulation signals. The optimal compensation signal is calculated by a dynamic limiter according to the intrinsic limitations of the system related to the variability range of the modulation signals. It significantly improves the voltage balancing under all operating conditions of the converter. In addition, this compensation strategy does not increase the switching frequencies of the power devices. The algorithm is tested and verified using both simulation and experimentation.
IEEE Transactions on Industrial Electronics | 2009
Jordi Zaragoza; Josep Pou; S. Ceballos; Eider Robles; P. Ibaez; J.L. Villate
This paper presents a hybrid modulation technique for the three-level neutral-point-clamped converter. A modulation strategy, based on two modulation signals per phase, was presented previously. This strategy completely removes the low-frequency voltage oscillations that appear at the neutral point (NP) in some operation conditions. However, it also has a major drawback: it significantly increases the switching losses of the converter. The proposal in this paper combines such a modulation strategy with sinusoidal pulsewidth modulation (SPWM). The main characteristic of this hybrid modulation is the reduction in switching losses at the cost of some low-frequency voltage oscillations at the NP. The amplitude of these oscillations can be controlled by varying the combination of the two strategies. The performance of the hybrid modulation is analyzed and compared with the original strategies. Power losses and oscillation amplitudes on the dc-link capacitors are evaluated. Experimental results show how the hybrid modulation performs by balancing the dc-link capacitors.
IEEE Transactions on Industrial Electronics | 2015
Josep Pou; Salvador Ceballos; Georgios Konstantinou; Vassilios G. Agelidis; Ricard Picas; Jordi Zaragoza
This paper studies different circulating current references for the modular multilevel converter. The circulating current references are obtained from the instantaneous values of the output current and modulation signal of the phase leg. Therefore, the determination of the amplitude and phase of the output current is not needed, which is a significant improvement compared to other methods such as those based on injecting specific harmonics in the circulating currents. Among the different methods studied in this paper, a new method is introduced, which is able to reduce the capacitor voltage ripples compared to the other methods. A closed-loop control is also proposed which is able to track the circulating current references. With the discussed methods, the average values of the capacitor voltages are maintained at their reference while the voltage ripples are kept low. Experimental results are presented to demonstrate the effectiveness of the proposed and discussed methods.
IEEE Transactions on Industrial Electronics | 2008
Salvador Ceballos; Josep Pou; Eider Robles; Igor Gabiola; Jordi Zaragoza; J.L. Villate; Dushan Boroyevich
This paper presents some modified topologies of the neutral-point-clamped converter. In all of them, the main change consists of adding a fourth leg, which is based on the flying-capacitor converter structure. The aim of this additional leg is to provide the converter with fault tolerance. Furthermore, during normal operation mode, this leg is able to provide a stiff neutral voltage. Consequently, the low-frequency voltage oscillations that appear at the neutral point of the standard three-level topology in some operating conditions no longer exist. As a result, the modulation strategy of the three main legs of the converter does not have to take care of voltage balance, and it can be designed to either achieve optimal output voltage spectra or improve the efficiency of the converter. Simulation and experimental results are presented to show the viability of this approach both under normal operation mode and in the event of faults.
IEEE Transactions on Power Electronics | 2010
Eider Robles; Salvador Ceballos; Josep Pou; José Luis Martín; Jordi Zaragoza; Pedro Ibañez
This paper proposes a filtered-sequence phase-locked loop (FSPLL) structure for detection of the positive sequence in three-phase systems. The structure includes the use of the Park transformation and moving average filters (MAF). Performance of the MAF is mathematically analyzed and represented in Bode diagrams. The analysis allows a proper selection of the window width of the optimal filter for its application in the dq transformed variables. The proposed detector structure allows fast detection of the grid voltage positive sequence (within one grid voltage cycle). The MAF eliminates completely any oscillation multiple of the frequency for which it is designed; thus, this algorithm is not affected by the presence of imbalances or harmonics in the electrical grid. Furthermore, the PLL includes a simple-frequency detector that makes frequency adaptive the frequency depending blocks. This guarantees the proper operation of the FSPLL under large frequency changes. The performance of the entire PLL-based detector is verified through simulation and experiment. It shows very good performance under several extreme grid voltage conditions.
IEEE Transactions on Industrial Electronics | 2010
Salvador Ceballos; Josep Pou; Eider Robles; Jordi Zaragoza; José Luis Martín
This paper presents a study of the fault tolerance capacity of a neutral-point-clamped converter. Different faults in power semiconductors are considered, and the available postfault states of the converter are shown. In regard of the operation limits, two possible solutions are presented. In these solutions, adding a reduced number of additional components, the behavior of the converter when a switch fails improves considerably. Furthermore, an analysis of the neutral-point voltage balancing conditions after a fault and reconfiguration of the system is also evaluated. Experimental results that prove the correct operation of the proposed topologies are shown.
conference of the industrial electronics society | 2005
Josep Pou; Pedro Rodriguez; Vicenc Sala; Jordi Zaragoza; Rolando Burgos; Dushan Boroyevich
This paper presents a novel modulation strategy for the neutral-point-clamped converter. This strategy overcomes one of the main problems of this converter, which is the low-frequency voltage oscillation that appears in the neutral point under some operating conditions. The proposed modulation strategy can completely remove this oscillation for all the operating points and for any kind of loads, even unbalanced and nonlinear loads. The algorithm is based on a carrier-based PWM. Nevertheless, it can generate the maximum output voltage amplitudes attainable under linear modulation, such as space-vector modulation. Furthermore, this technique can be implemented with a very simple algorithm, and hence can be processed very quickly. A control loop for balancing the voltages on the DC-link capacitors is also proposed. This balancing strategy is designed so that it does not increase the switching frequencies of the devices when it is applied to the converter. The proposed modulation technique is verified by simulation and experiment
IEEE Transactions on Power Electronics | 2015
Ricard Picas; Salvador Ceballos; Josep Pou; Jordi Zaragoza; Georgios Konstantinou; Vassilios G. Agelidis
In this paper, a new discontinuous modulation technique is presented for the operation of the modular multilevel converter (MMC). The modulation technique is based on adding a zero sequence to the original modulation signals so that the MMC arms are clamped to the upper or lower terminals of the dc-link bus. The clamping intervals are controlled according to the absolute value of the output current to minimize the switching losses of the MMC. A significant reduction in the capacitor voltage ripples is achieved, especially when operating with low modulation indices. Furthermore, a circulating current control strategy suitable for this modulation technique is also proposed. Simulation and experimental results under various operating points are reported along with evaluation and comparison results against a conventional carrier-based pulse width modulation method.