Gabriel Virbila

A 144GHz 0.76cm-resolution sub-carrier SAR phase radar for 3D imaging in 65nm CMOS

Millimeter-Wave-based radar has gained attention in recent years for automotive and object detection applications. Several new applications are also emerging which employ mm-Wave radar techniques to construct short range mm-Wave 3D imaging systems for security screening and biomedical applications. At present, these types of 3D mm-Wave imagers have only been demonstrated in lll-V technology, as CMOS-based radar suffers several range and resolution limitations due to limited output power and linearity.Most CMOS mm-Wave radar systems used in automotive applications are based on Frequency-Modulated Continuous-Wave (FMCW) ranging techniques in which the carrier is swept to produce a frequency offset at the receiver output proportional to the round-trip distance between the radar and target. While FMCW is an excellent approach for accurate ranging, its implementation becomes particularly difficult at high frequencies as the resolution is heavily dependent on sweep linearity and the high RF front-end performance required to support the wideband swept carrier. For 3D mm-Wave imaging applications, this high operating frequency is indispensable as the attainable spatial (XY) resolution is fundamentally limited by the wavelength of the imaging system. Higher frequency also helps relax focusing lens requirements, as the optical diffraction limit is set by the ratio of the radar wavelength over the lens aperture size.

A low-overhead self-healing embedded system for ensuring high yield and long-term sustainability of 60GHz 4Gb/s radio-on-a-chip

The available ISM band from 57-65GHz has become attractive for high-speed wireless applications including mass data transfer, streaming high-definition video and even biomedical applications. While silicon based data transceivers at mm-wave frequencies have become increasingly mature in recent years [1,2,3], the primary focus of the circuit community remains on the design of mm-wave front-ends to achieve higher data rates through higher-order modulation and beamforming techniques. However, the sustainability of such mm-wave systems when integrated in a SoC has not been addressed in the context of die performance yield and device aging. This problem is especially challenging for the implementation of mm-wave SoCs in deep sub-micron technology due to its process & operating temperature variations and limited ft / fmax with respect to the operation frequency.

A wide-band 65nm CMOS 28–34 GHz synthesizer module enabling low power heterodyne spectrometers for planetary exploration

This paper presents a wide-band 28-34 GHz frequency synthesizer module developed to support THz spectrometer instruments for planetary exploration. The presented module features low power operation and a small form factor to be compatible with the demanding payload requirements of NASA planetary missions. The core of the module is a CMOS System-on-Chip (SoC) containing a sub-sampled phase-detector (SSPD) based phase lock-loop, power amplifier, power sensor and digital calibration. The demonstrated module draws a total of 81.2 mW of power from a USB connection and provides coverage from 28-34 GHz with output powers better than -4.0 dBm across the entire band. The offered mid-band phase noise is measured at -96.6 dBc/Hz evaluated at 1 MHz offset from the carrier.

A

A D-band CMOS transmitter is presented with an integrated injection-locked frequency-tripling synthesizer, digital control, and an on-chip antenna. It employs an IF feed-forward pre-distortion scheme, which improves gain compression of the transmitter to provide an overall higher linearity gain profile, allowing reduced power back-off for higher peak-to-average modulation schemes. The integrated D-band transmitter consumes 347 mW and occupies 1800× 1500 μm of silicon area. The proposed transmitter delivers 0.4 dBm of effective isotropic radiated power with a saturated power on-chip of at least 12.2 dBm. The transmitter has a peak power-added efficiency (PAE) of 4.8% with power delivered to the antenna and a peak PAE of 0.31% when considering radiated power.

D

This paper presents a scalable transmit phase array operating at 140 GHz which employs a local PLL reference generation system. Unlike traditional CMOS phase arrays, this enables the array to be formed over multiple chips while avoiding the challenges of distributing mm-wave signals between them. The prototype chip consumes 131 mW of power and occupies 1.95 mm2 of chip area when implemented in 65 nm CMOS technology.

-Band CMOS Transmitter With IF-Envelope Feed-Forward Pre-Distortion and Injection-Locked Frequency-Tripling Synthesizer

This paper presents a mm-wave imaging CMOS regenerative receiver which is intermodulated by a second oscillator to provide multiple receive bands at 349, 201 and 53 GHz for false color imaging. The proposed receiver consumes 18.2mW per pixel and occupies 0.021mm2 of silicon area.

A 65nm CMOS 140 GHz 27.3 dBm EIRP transmit array with membrane antenna for highly scalable multi-chip phase arrays

This paper presents a 95 GHz centimeter scale navigation system which allows a unmanned ground vehicle (UGV) or possibly even aerial vehicle (UAV) to navigate through a highly cluttered environment and follow a safe obstacle-free pathway to a desired goal. The navigation system defines multiple pathways using mm-wave base-stations called path generators and then uses a single CMOS SoC containing a receiver, ADC and an FFT processor to detect and navigate these pathways. The demonstrated confined pathway SoC (CP-SoC) occupies 5.4mm2 of silicon area in 65nm technology, and consumes only 199 mW, making it suitable for lightweight payloads associated with UAVs and UGVs.

A max 349 GHz 18.2mW/pixel CMOS inter-modulated regenerative receiver for tri-color mm-wave imaging

We have realized a 200GHz 4×4 focal plane array (FPA) by using super-regenerative receiver (SRR) pixels made of 65nm CMOS for mm-wave imaging applications. With 16 pixel elements constructed on PCB, the FPA consumes 215mA under 1V power supply. Such realization is made possible by carefully analyzing the super-regenerative interference (SRI) commonly observed in close-spaced SRRs and applying a newly developed quench synchronization scheme to suppress the undesired SRI.

A 95 GHz centimeter scale precision confined pathway system-on-chip navigation processor for autonomous vehicles in 65nm CMOS

This paper presents a complete phase-based radar system operating at 155 GHz which employs a non-coherent approach to ranging, offering the major advantage that frequency synthesizers are not needed in the Tx and Rx. This enables the possibility of multi-pixel radar systems through a 51% reduction of total system power vs. similar coherent radar. The proposed radar system achieves sub-centimeter target position accuracy and consumes only 220mW per radar channel (excluding commercial phase detector) in a 65nm CMOS technology.

A 200 GHz 16-pixel focal plane array imager using CMOS super regenerative receivers with quench synchronization

A CMOS D-band 135-150 GHz transmitter is presented with integrated digital control and on-chip antenna. The proposed transmitter employs an IF feed-forward compensation scheme which improves the soft gain compression of the power amplifier by 5.1dB to provide an overall more linear AM-AM profile allowing reduced power back-off for modulation schemes with a high peak-to-average ratio. The proposed D-band transmitter consumes 255mW and occupies 2000 × 1500 um of silicon area. The proposed transmitter delivers a 0.4 dBm EIRP and a saturated power on chip of 13.2 dBm. The transmitter has a peak PAE of 8.2% with power delivered to the antenna and a peak PAE of 0.4% when considering radiated power.