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Gen P. Lauer

IBM

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Publication

Featured researches published by Gen P. Lauer.

Archive | 2016

STACKED PLANAR DOUBLE-GATE LAMELLAR FIELD-EFFECT TRANSISTOR

Josephine B. Chang; Michael A. Guillorn; Gen P. Lauer; Isaac Lauer; Jeffrey W. Sleight

Archive | 2014

III-V, Ge, or SiGe fin base lateral bipolar transistor structure and method

Josephine B. Chang; Gen P. Lauer; Isaac Lauer; Jeffrey W. Sleight

Archive | 2013

Low Temperature Salicide for Replacement Gate Nanowires

Josephine B. Chang; Michael A. Guillorn; Gen P. Lauer; Isaac Lauer; Jeffrey W. Sleight

Archive | 2017

Structure and method to reduce shorting in STT-MRAM device

Anthony J. Annunziata; Gen P. Lauer; Nathan P. Marchack

Archive | 2014

III-V, SiGe, or Ge Base Lateral Bipolar Transistor and CMOS Hybrid Technology

Josephine B. Chang; Gen P. Lauer; Isaac Lauer; Jeffrey W. Sleight

Archive | 2013

V-GROOVE SOURCE/DRAIN MOSFET AND PROCESS FOR FABRICATING SAME

Michael A. Guillorn; Gen P. Lauer; Isaac Lauer; Jeffrey W. Sleight

Archive | 2012

Fin bipolar transistors having self-aligned collector and emitter regions

Josephine B. Chang; Gen P. Lauer; Isaac Lauer; Jeffrey W. Sleight

Archive | 2017

Structure and method to reduce shorting and process degradation in stt-mram devices

Anthony J. Annunziata; Gen P. Lauer; Janusz J. Nowak; Eugene J. O'Sullivan

Archive | 2016

Magnetic tunnel junction with post-deposition hydrogenation

Anthony J. Annunziata; Chandrasekharan Kothandaraman; Gen P. Lauer

Archive | 2017

INTERNAL SPACER FORMATION FROM SELECTIVE OXIDATION FOR FIN-FIRST WIRE-LAST REPLACEMENT GATE-ALL-AROUND NANOWIRE FET

Szu-Lin Cheng; Michael A. Guillorn; Gen P. Lauer; Isaac Lauer

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Isaac Lauer

IBM

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Jeffrey W. Sleight

IBM

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Anthony J. Annunziata

IBM

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Michael A. Guillorn

IBM

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Josephine B. Chang

IBM

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Nathan P. Marchack

IBM

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Chandrasekharan Kothandaraman

IBM

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Deborah A. Neumayer

IBM

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Eric A. Joseph

IBM

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Eugene J. O'Sullivan

IBM

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