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Dive into the research topics where George A. Kaplita is active.

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Featured researches published by George A. Kaplita.


Process, equipment, and materials control in integrated circuit manufacturing. Conference | 1999

Polysilicon planarization and plug recess etching in a decoupled plasma source chamber using two endpoint techniques

George A. Kaplita; Stefan Schmitz; Rajiv M. Ranade; Gangadhara S. Mathad

The planarization and recessing of polysilicon to form a plug are processes of increasing importance in silicon IC fabrication. While this technology has been developed and applied to DRAM technology using Trench Storage Capacitors, the need for such processes in other IC applications (i.e. polysilicon studs) has increased. Both planarization and recess processes usually have stringent requirements on etch rate, recess uniformity, and selectivity to underlying films. Additionally, both processes generally must be isotropic, yet must not expand any seams that might be present in the polysilicon fill. These processes should also be insensitive to changes in exposed silicon area (pattern factor) on the wafer. A SF6 plasma process in a polysilicon DPS (Decoupled Plasma Source) reactor has demonstrated the capability of achieving the above process requirements for both planarization and recess etch. The SF6 process in the decoupled plasma source reactor exhibited less sensitivity to pattern factor than in other types of reactors. Control of these planarization and recess processes requires two endpoint systems to work sequentially in the same recipe: one for monitoring the endpoint when blanket polysilicon (100% Si loading) is being planarized and one for monitoring the recess depth while the plug is being recessed (less than 10% Si loading). The planarization process employs an optical emission endpoint system (OES). An interferometric endpoint system (IEP), capable of monitoring lateral interference, is used for determining the recess depth. The ability of using either or both systems is required to make these plug processes manufacturable. Measuring the recess depth resulting from the recess process can be difficult, costly and time- consuming. An Atomic Force Microscope (AFM) can greatly alleviate these problems and can serve as a critical tool in the development of recess processes.


Archive | 1986

Lithographic image size reduction.

Nicholas James Giammarco; Alexander Gimpelson; George A. Kaplita; Alexander D. Lopata; Anthony Francis Scaduto; Joseph F. Shepard


Archive | 1987

Rie process for etching silicon isolation trenches and polycides with vertical surfaces

James Allan Bondur; Nicholas James Giammarco; Thomas Adrian Hansen; George A. Kaplita; John S. Lechaton


Archive | 1985

Reactive ion etching apparatus

Nicholas James Giammarco; George A. Kaplita


Archive | 1987

Mask using lithographic image size reduction

Nicholas James Giammarco; Alexander Gimpelson; George A. Kaplita; Alexander D. Lopata; Anthony Francis Scaduto; Joseph F. Shepard


Archive | 2001

DUAL MASK PROCESS FOR SEMICONDUCTOR DEVICES

Joyce C. Liu; James C. Brighten; Jeffrey J. Brown; John Golz; George A. Kaplita; Rebecca D. Mih; Senthil Srinivasan; Jin Jwang Wu; Teresa J. Wu; Chienfan Yu


Archive | 2005

Process and system for etching doped silicon

Len Y. Tsou; Rajiv M. Ranade; George A. Kaplita; Hongwen Yan; Rich Wise; Akiteru Ko


Archive | 1998

Universal cleaning wafer for a plasma chamber

Jeffrey J. Brown; Christopher N. Collins; Wilson Tong Lee; George A. Kaplita; Stefan Schmitz; Len Y. Tsou


Archive | 1989

LITHOGRAPHIC IMAGE SIZE REDUCTION PHOTOMASK

Nicholas James Giammarco; Alexander Gimpelson; George A. Kaplita; Alexander D. Lopata; Anthony Francis Scaduto; Joseph F. Shepard


Archive | 1987

Rie-verfahren um isolationsrillen mit senkrechten flanken in silizium und polycid zu aetzen. Rie-moved by isolation grooves with vertical flanks in silicon and polycide etch.

James Allan Bondur; Nicholas James Giammarco; Thomas Adrian Hansen; George A. Kaplita; John S. Lechaton

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