John S. Lechaton

Rie process for etching silicon isolation trenches and polycides with vertical surfaces

Total dielectric isolation for integrated circuits

END POINT DETECTION METHOD AND APPARATUS FOR SPUTTER ETCHING

RF sputtering apparatus having floating anode shield

Method of planarizing silicon dioxide in semiconductor devices

Method for making a base etched transistor integrated circuit

Structure for making coplanar layers of thin films

Method of making semiconductor device contact including transition metal-compound dopant source

PARTIAL PLANARIZATION OF ELECTRICALLY INSULATIVE FILMS BY RESPUTTERING

Forming feedthrough connections for multi-level interconnections metallurgy systems