George G. Totir

All-Wet, Metal-Compatible High-Dose-Implanted Photoresist Strip

An all-wet process based on a novel chemistry has been developed to enable the removal of high-dose implanted photoresist in the presence of exposed metal layers and other materials typical of advanced gate stacks.

Evaluation of emitter profiles and lateral uniformity on crystalline silicon photovoltaic cells using scanning capacitance microscopy

Scanning capacitance microscopy (SCM) has been used to generate two dimensional images of emitters formed using various doping techniques on polished and textured silicon photovoltaic cells. SCM has the advantage of high spatial resolution and sensitivity to carrier concentrations in the range of 1014 – 1020 cm−3. The ability to image emitters on textured substrates allows evaluation of variations in emitter thickness in local regions due to the surface texture or doping technique as well as other processing steps such as metallization.

Development and characterization of advanced process technologies for the fabrication of crystalline-Si solar cells

Photovoltaic devices were fabricated at IBM TJ Watson Research Center using a research line designed to run different substrate types concurrently. The process knowledge gained from CMOS IC fabrication is applied to solar cell fabrication to create cells with plated Cu front metallization, Al back contacts, and PECVD SiN ARC. The interaction between substrate type and process conditions for saw damage etch, PECVD SiN deposition and emitter formation (thermal budget exposure) is presented in this paper. Electroplating process characterization results are discussed. The effects on the electrical characteristics of the photovoltaic device due to the process parameters chosen, and due to extrinsic defects, are discussed.