Martin M. Frank

HfO2 and Al2O3 gate dielectrics on GaAs grown by atomic layer deposition

High-performance metal-oxide-semiconductor field effect transistors (MOSFETs) on III–V semiconductors have long proven elusive. High-permittivity (high-κ) gate dielectrics may enable their fabrication. We have studied hafnium oxide and aluminum oxide grown on gallium arsenide by atomic layer deposition. As-deposited films are continuous and predominantly amorphous. A native oxide remains intact underneath HfO2 during growth, while thinning occurs during Al2O3 deposition. Hydrofluoric acid etching prior to growth minimizes the final interlayer thickness. Thermal treatments at ∼600°C decompose arsenic oxides and remove interfacial oxygen. These observations explain the improved electrical quality and increased gate stack capacitance after thermal treatments.

Advanced high-κ dielectric stacks with polySi and metal gates: recent progress and current challenges

The paper reviews our recent progress and current challenges in implementing advanced gate stacks composed of high-κ dielectric materials and metal gates in mainstream Si CMOS technology. In particular, we address stacks of doped polySi gate electrodes on ultrathin layers of high-κ dielectrics, dual-workfunction metal-gate technology, and fully silicided gates. Materials and device characterization, processing, and integration issues are discussed.

High performance and highly uniform gate-all-around silicon nanowire MOSFETs with wire size dependent scaling

We demonstrate undoped-body, gate-all-around (GAA) Si nanowire (NW) MOSFETs with excellent electrostatic scaling. These NW devices, with a TaN/Hf-based gate stack, have high drive-current performance with NFET/PFET I<inf>DSAT</inf> = 825/950 µA/µm (circumference-normalized) or 2592/2985 µA/µm (diameter-normalized) at supply voltage V<inf>DD</inf> = 1 V and off-current I<inf>OFF</inf> = 15 nA/µm. Superior NW uniformity is obtained through the use of a combined hydrogen annealing and oxidation process. Clear scaling of short-channel effects versus NW size is observed.

Absence of magnetism in hafnium oxide films

We establish the limits of magnetism in thin, electronic grade, hafnium oxide, and hafnium silicate films deposited onto silicon wafers by chemical vapor deposition and atomic layer deposition. To the limits of sensitivity of our measurement techniques, no ferromagnetism occurs in these samples. Contamination by handling with stainless-steel tweezers leads to a measurable magnetic signal. The magnetic properties of this contamination are similar to those attributed to ferromagnetic HfO2 in a recent report, including the magnitude of moment, magnetization field dependence, and spatial asymmetry.

Germanium channel MOSFETs: opportunities and challenges

This paper reviews progress and current critical issues with respect to the integration of germanium (Ge) surface-channel MOSFET devices as well as strained-Ge buried-channel MOSFET structures. The device design and scalability of strained-Ge buried-channel MOSFETs are discussed on the basis of our recent results. CMOS-compatible integration approaches of Ge channel devices are presented.

Nucleation and interface formation mechanisms in atomic layer deposition of gate oxides

We present an in situ infrared spectroscopic study of the interface formation during atomic layer deposition of alternative high-permittivity (high-κ) gate dielectrics. Layer-by-layer oxide growth may be achieved by alternating pulses of a molecular metal precursor (e.g., trimethylaluminum for aluminum oxide growth) and water vapor. Contrary to common belief, we find that the metal precursor, not the oxidizing agent, is the key factor to control Al2O3 nucleation on hydrogen-terminated silicon. Metal surface species catalyze subsurface Si oxidation. These findings have direct implications on growth conditions to optimize semiconductor-dielectric interfaces.

Sub-bandgap defect states in polycrystalline hafnium oxide and their suppression by admixture of silicon

The crystallinity of atomic layer deposition hafnium oxide was found to be thickness dependent, with the thinnest films being amorphous and thick films being at least partially crystalline. Hafnium oxide films fabricated by metalorganic chemical vapor deposition are mostly monoclinic. Formation of hafnium silicate by admixture of 20% Si prevents crystallization. Electronic defects are reflected by an absorption feature 0.2–0.3 eV below the optical bandgap. These defects arise in polycrystalline, but not in amorphous, hafnium-based oxides.

Enhanced initial growth of atomic-layer-deposited metal oxides on hydrogen-terminated silicon

A route is presented for activation of hydrogen-terminated Si(100) prior to atomic layer deposition. It is based on our discovery from in situ infrared spectroscopy that organometallic precursors can effectively initiate oxide growth. Narrow nuclear resonance profiling and Rutherford backscattering spectrometry show that surface functionalization by pre-exposure to 108 Langmuir trimethylaluminum at 300 °C leads to enhanced nucleation and to nearly linear growth kinetics of the high-permittivity gate dielectrics aluminum oxide and hafnium oxide.

Hafnium oxide gate dielectrics on sulfur-passivated germanium

Sulfur passivation of Ge(100) is achieved using aqueous ammonium sulfide (NH4)2S(aq). The passivation layer is largely preserved after atomic layer deposition of the high-κ dielectric material HfO2 when sufficiently low growth temperatures (e.g., 220°C) are employed. Oxygen incorporation is moderate and results in an electrically passivating GeOS interface layer. The HfO2∕GeOS∕Ge gate stack exhibits lower fixed charge and interface state density than a more conventional HfO2∕GeON∕Ge gate stack fabricated via an ammonia gas treatment.

A manufacturable dual channel (Si and SiGe) high-k metal gate CMOS technology with multiple oxides for high performance and low power applications

Band-gap engineering using SiGe channels to reduce the threshold voltage (VTH) in p-channel MOSFETs has enabled a simplified gate-first high-к/metal gate (HKMG) CMOS integration flow. Integrating Silicon-Germanium channels (cSiGe) on silicon wafers for SOC applications has unique challenges like the oxidation rate differential with silicon, defectivity and interface state density in the unoptimized state, and concerns with Tinv scalability. In overcoming these challenges, we show that we can leverage the superior mobility, low threshold voltage and NBTI of cSiGe channels in high-performance (HP) and low power (LP) HKMG CMOS logic MOSFETs with multiple oxides utilizing dual channels for nFET and pFET.