Gerard J. M. Wienk

A CMOS switched transconductor mixer

A new CMOS active mixer topology can operate at low supply voltages by the use of switches exclusively connected to the supply voltages. Such switches require less voltage headroom and avoid gate-oxide reliability problems. Mixing is achieved by exploiting two transconductors with cross-coupled outputs, which are alternatingly activated by the switches. For ideal switching, the operation is equivalent to a conventional active mixer. This paper analyzes the performance of the switched transconductor mixer, in comparison with the conventional mixer, demonstrating competitive performance at a lower supply voltage. Moreover, the new mixer has a fundamental noise benefit, as noise produced by the switch-transistors and LO-port is common mode noise, which is rejected at the differential output. An experimental prototype with 12-dB conversion gain was designed and realized in standard 0.18-/spl mu/m CMOS to operate at only a 1-V supply. Experimental results show satisfactory mixer performance up to 4 GHz and confirm the fundamental noise benefit.

A Polyphase Multipath Technique for Software-Defined Radio Transmitters

Transmitter circuits using large signal swings and hard-switched mixers are power-efficient, but also produce unwanted harmonics and sidebands, which are commonly removed using dedicated filters. This paper presents a polyphase multipath technique to relax or eliminate filters by canceling a multitude of harmonics and sidebands. Using this technique, a wideband and flexible power upconverter with a clean output spectrum is realized in 0.13-mum CMOS, aiming at a software-defined radio application. Prototype chips operate from DC to 2.4 GHz with spurs smaller than -40 dBc up to the 17th harmonic (18-path mode) or 5th harmonic (6-path mode) of the transmit frequency, without tuning or calibration. The transmitter delivers 8 mW of power to a 100-Omega load (2.54 Vpp-diff voltage swing) and the complete chip consumes 228 mW from a 1.2-V supply. It uses no filters, but only digital circuits and mixers

A Flicker Noise/IM3 Cancellation Technique for Active Mixer Using Negative Impedance

This paper presents an approach to simultaneously cancel flicker noise and IM3 in Gilbert-type mixers, utilizing negative impedances. For proof of concept, two prototype double-balanced mixers in 0.16- μm CMOS are fabricated. The first demonstration mixer chip was optimized for full IM3 cancellation and partial flicker noise cancellation; this chip achieves 9-dB flicker noise suppression, improvements of 10 dB for IIP3, 5 dB for conversion gain, and 1 dB for input P1 dB while the thermal noise increased by 0.1 dB. The negative impedance increases the power consumption for the mixer by 16% and increases the die area by 8% (46 × 28 μm 2). A second demonstration mixer chip aims at full flicker noise cancellation and partial IM3 cancellation, while operating on a low supply voltage (0.67 × VDD); in this chip, the negative impedance increases the power consumption by 7.3% and increases the die area by 7% (50 × 20 μm 2). For one chip sample, measurements show >10-dB flicker noise suppression within ±200% variation of the negative impedance bias current; for ten randomly selected chip samples, >11-dB flicker noise suppression is measured.

Multipath Polyphase Circuits and their Application to RF Transceivers

Nonlinearity and time-variance in radio frequency (RF) circuits leads to unwanted harmonics and intermodulation products, e.g. in power amplifiers and mixers. This paper reviews a recently proposed multipath polyphase circuit technique which can cancel such harmonics and intermodulation products. This will be illustrated using a power upconverter IC as an example. The upconverter works from DC to 2.4 GHz, and the multipath polyphase technique cleans its spectrum up to the 17th harmonic, keeping unwanted spurious responses more than 40dB below the carrier. The technique can also be useful for other applications, and some possible applications will be discussed.

Towards minimum achievable phase noise of relaxation oscillators

A relaxation oscillator design is described, which has a phase noise rivaling ring oscillators, while also featuring linear frequency tuning. We show that the comparator in a relaxation-oscillator loop can be prevented from contributing to 1/f2 colored phase noise and degrading control linearity. The resulting oscillator is implemented in a power efficient way with a switched-capacitor circuit. The design results from a thorough analysis of the fundamental phase noise contributions. Simple expressions modeling the theoretical phase noise performance limit are presented, as well as a design strategy to approach this limit. To verify theoretical predictions, a relaxation oscillator is implemented in a baseline 65nm CMOS process, occupying 200µm × 150µm. Its frequency tuning range is 1-12MHz, and its phase noise is L100kHz=-109dBc/Hz at fosc=12MHz, while consuming 90µW. A figure of merit of -161dBc/Hz is achieved, which is only 4dB from the theoretical limit. Copyright

A Wideband IM3 Cancellation Technique for CMOS

A wideband IM3 cancellation technique for CMOS attenuators is presented. With proper transistor width ratios, the dominant distortion currents of transistor switches cancel each other. As a result, a high IIP3 robust to PVT variations can be achieved without using large transistors. Two prototypes in a 0.16 μm standard bulk CMOS process are presented: a Π-attenuator with four discrete settings obtains +26 dBm IIP3 and +3 dBm 1 dB-compression point (CP) for 50 MHz to 5 GHz with only 0.0054 mm2 active area, and a similar T-attenuator system which obtains +27 dBm IIP3 and +13 dBm CP for 50 MHz to 5.6 GHz with only 0.0067 mm2 active area.

{\bf \Pi}

Radio transceivers capable of dynamic spectrum access require frequency-agile transmitters with a clean output spectrum. High- Q filters are difficult to implement on chip and have limited tuning range. Transmitters with high linearity and broadband harmonic rejection can be more flexible and require less filtering. However, traditional harmonic rejection mixers suppress only a few harmonics. This paper presents an 8-path polyphase transmitter, which exploits mixer-LO duty-cycle control and a tunable first-order RC low-pass filter to suppress ALL harmonics to below -40 dBc. The optimum duty-cycle theoretically is 43.65% and a resolution of better than 0.1% is required to keep the spread in harmonic rejection within 1 dB. We propose a simple monotonic duty-cycle control circuit and show by design equations and measurements that it achieves the required resolution over three octaves of frequency range. Also, analysis indicates that LO duty-cycle reduction compared with 50% improves power upconverter efficiency. A transmitter realized in 0.16- μm CMOS works from 100 to 800 MHz at a maximum single-tone output power of 10.8 dBm with an efficiency of 8.7%, outperforming previous designs. The OIP3 is >21 dBm, while the LO leakage and image rejection is better than -45 dBc.

- and T-Attenuators

A negative impedance is used to enable distortion cancellation between the transconductor and the cascode transistor for LNAs with a cascode topology. As a proof of concept, a resistive feedback LNA using this IM3 cancellation technique in a standard 0.16μm CMOS process shows that for 0.1GHz to 1GHz, improvements of 6.3dB to 10dB for IIP3 and 0.2dB to 1dB for gain are achieved without noise degradation. The power consumption for the LNA is increased by 2%, and the die area by about 700μm2.

A 100–800 MHz 8-Path Polyphase Transmitter With Mixer Duty-Cycle Control Achieving

A new CMOS mixer topology can operate at low supply voltages by using switches connected only to the supplies. Mixing is achieved exploiting two cross-coupled transconductors, which are alternatingly activated by the switches. A down conversion mixer prototype with 12 dB conversion gain was designed and realized in standard 0.18 /spl mu/m CMOS. It achieves satisfactory mixer performance up to 4 GHz, at a supply voltage of 1 Volt. Moreover, the mixer topology features a fundamental high frequency noise figure benefit.