Glenn A. Biery

The electromigration short‐length effect in Ti‐AlCu‐Ti metallization with tungsten studs

The electromigration short‐length effect has been investigated by testing a two‐level structure with Ti‐AlCu‐Ti stripes and interlevel tungsten (W) stud vias. This investigation represents a complete study of the short‐length effect using a technologically realistic test structure. Lifetime measurements and resistance changes as a function of time were used to describe this phenomenon, where the latter approach provides new insights into the electromigration behavior of multilayered metallizations. A linear increase in resistance was followed by a resistance change with time that approached zero. For the same product of current density and stripe length, longer stripes increased in resistance to higher values than shorter stripes. The sigma of the lognormal distribution increased as the current density decreased and/or as the maximum allowed resistance change increased. The lifetime, or t50, at relatively small current densities did not obey Black’s empirical equation. Rather, the lifetime data obeyed a m...

Paradoxical predictions and a minimum failure time in electromigration

A paradox arises when the two‐parameter log‐normal distribution is used to predict early electromigration lifetimes of a two‐level structure with Ti–AlCu–Ti stripes and interlevel W stud‐vias. The paradox is a direct consequence of the observed increase in the log‐normal sigma (σ) as the current density decreases and/or as the maximum allowed resistance change increases. The increase in σ implies that the first failures from equal and large sample sizes are expected to occur at low current densities rather than at high current densities. Similarly, for example, samples at relatively low cumulative failure are expected to fail at high levels of resistance change before failing at low levels of resistance change. This apparent paradox is resolved by testing a large set of samples and fitting the failure data to the three‐parameter log‐normal distribution. The third parameter, an incubation time or a minimum time required before failure can occur, is shown to increase as the maximum allowed resistance change...

1/f noise and electromigration in aluminum films: The role of film microstructure and texture

The role of crystallographic texture on excess noise and the ability of excess noise to predict the electromigration behavior of pure aluminum films is examined. We report the excess noise and electromigration behavior of pure Al films which were deposited under a variety of conditions to obtain significantly different crystallographic textures. The noise magnitude and the logarithmic slope (α) were measured on three distinct sets of aluminum films as a function of linewidth (∼0.5–2 μm). Previously the electromigration lifetimes of these films were directly related to the (111) volume fraction. This study shows that excess noise is inversely proportional to the (111) volume fraction, suggesting that excess noise may not be measuring the same rate limiting atomic process as electromigration. The effect of film texture combined with a lower noise magnitude with decreasing linewidth implies that grain boundaries are a major source of noise in Al films.

Evaluation of the Chemical-mechanical Planarization (CMP) Performance of Silicon Nitride and Silicon Carbide as Hard Mask Materials for Cu-based Interconnect Technology

Hydrogenated silicon nitride, hydrogenated silicon carbide, and their intermediates were chemo-mechanically polished. Results showed that, within the material set examined, harder materials also have higher CMP removal rates. In addition, CMP rates for multilayer stacks did not follow those for single layers. Polish mechanisms were proposed to explain these phenomena.

Temperature Dependence of the l/f Noise in Heat-Treated Films of Al And Al-Cu

The 1/f noise in heat-treated Al and AI-Cu thin films was investigated at a current density of 20 mA/μm 2 from approximately RT to 200 C. The results were consistent with the Dutta-Dimon-Hom model, i.e., the noise is the result of a collection of two-state systems. From the temperature dependence of the noise, a modified Dutta-Dimon-Hom model was used to extract the energy of formation, Δ H f , and the energy of migration, Δ H m , of the noise process. The development as well as simulations of this model will be discussed. It will be shown that Δ H m can be determined through investigation of the temperature at which the noise magnitude peaks for many frequencies. It will also be shown that Δ H f can be determined by investigation of the temperature at which the noise magnitude peaks and the temperature at which a, the negative of the logarithmic slope of the power spectral density, passes through 1. For both the Al and Al-Cu films, Δ H m was approximately 0.7 eV. The results also indicated that Δ H f was ≤ 0.1 eV for the Al films, and only slightly higher, i.e., 0.1 - 0.2 eV, for the Al-Cu films. The temperature at which cx passes through I was similar for both the Al and AI-Cu films. These results strongly suggest that the l/f noise is caused by the motion of Al atoms along the grain boundaries.

Application of E-beam hot spot inspection for early detection of systematic patterning problems to a FinFET technology

Abstract. Early in-line detection of systematic patterning problems in technology development can dramatically improve a technology’s chance for success. By uncovering layout geometries that are difficult to implement, prompt action may be taken so that solutions are in place well before product chips that contain these and similar patterns enter the manufacturing line. If a solution is not in place, this could spell disaster for the product and perhaps even the technology. Ideally, product chips will work on the first lot, which is referred to as “first time right.” To help ensure this, a methodology for in-line detection of systematic patterning problems using E-beam hot spot inspection (EBHI) was developed. We review this methodology, including the latest enhancements. Pattern simulation tools and other sources are used to provide die locations with challenging geometries for evaluation. EBHI evaluates the patterning capability for these locations using modulated wafers. A multifunction team addresses any hot spots that fail within the process window. EBHI is then used to evaluate the solutions proposed by this team. Application of this methodology to a fin-shaped field effect transistor technology is described using examples from the fin and back end of line modules. These examples illustrate the full range of actions used to resolve patterning issues.

Line length effects on lifetime measurements and resistance saturation during electromigration testing

The effect of line length on the electromigration behavior of a two-level structure with Ti-AlCu-Ti stripes and interlevel tungsten (W) stud-vias has been investigated. This investigation also represents a complete study of the short-length effect using a technologically-realistic test structure. Lifetime measurements and resistance changes as a function of time were used to characterize this phenomenon, where the latter approach provides new insights into the electromigration behavior of multi-layered metallizations. A linear increase in resistance was followed by a resistance change with time that approached zero. For the same product of current density and stripe length, longer stripes increased in resistance to higher values than shorter stripes. The sigma of the lognormal distribution increased as the current density decreased and/or as the maximum allowed resistance change increased. The lifetime, or t50, at relatively small current densities did not obey Black’s empirical equation. Rather, the life...

From Process Assumptions to Development to Manufacturing

A tool has been developed that can be used to characterize or validate a BEOL interconnect technology. It connects various process assumptions directly to electrical parameters including resistance. The resistance of narrow copper lines is becoming a challenging parameter, not only in terms of controlling its value but also understanding the underlying mechanisms. The resistance was measured for 45nm-node interconnects and compared to the theory of electron scattering. This work will demonstrate how valuable it is to directly link the electrical models to the physical on-wafer dimensions and in turn to the process assumptions. For example, one can generate a tolerance pareto for physical and or electrical parameters that immediately identifies those process sectors that have the largest contribution to the overall tolerance. It also can be used to easily generate resistance versus capacitance plots which provide a good BEOL performance gauge. Several examples for 45nm BEOL will be given to demonstrate the value of these tools.