Ronald G. Filippi

Electromigration threshold in copper interconnects

The electromigration threshold in copper interconnects is reported in this study. The length-dependent electromigration degradation rate is observed and quantified in the temperature range of 295–400 °C. Based on the Blech electromigration model [I. A. Blech, J. Appl. Phys. 47, 1203 (1976)], a simplified equation is proposed to analyze the experimental data from various combinations of current density and interconnect length, as well as to estimate the electromigration threshold product of current density and line length, (jL)th, at a certain temperature. The resulting (jL)th value appears to be temperature dependent, decreasing with increasing temperature in the tested range between 295 and 400 °C.

The electromigration short‐length effect in Ti‐AlCu‐Ti metallization with tungsten studs

The electromigration short‐length effect has been investigated by testing a two‐level structure with Ti‐AlCu‐Ti stripes and interlevel tungsten (W) stud vias. This investigation represents a complete study of the short‐length effect using a technologically realistic test structure. Lifetime measurements and resistance changes as a function of time were used to describe this phenomenon, where the latter approach provides new insights into the electromigration behavior of multilayered metallizations. A linear increase in resistance was followed by a resistance change with time that approached zero. For the same product of current density and stripe length, longer stripes increased in resistance to higher values than shorter stripes. The sigma of the lognormal distribution increased as the current density decreased and/or as the maximum allowed resistance change increased. The lifetime, or t50, at relatively small current densities did not obey Black’s empirical equation. Rather, the lifetime data obeyed a m...

The effect of current density and stripe length on resistance saturation during electromigration testing

Resistance saturation as a function of current density and stripe length has been investigated for a two‐level structure with Ti/TiN/AlCu/Ti/TiN stripes and interlevel W stud vias. A simple model relating the resistance change at saturation to the current density and stripe length is formulated for structures with short stripe lengths and blocking boundaries at both ends. Experimental results for stripe lengths of 25, 50, or 100 μm are in good agreement with the model predictions.

The effect of a threshold failure time and bimodal behavior on the electromigration lifetime of copper interconnects

Electromigration results are described for a Dual Damascene structure with copper metallization and a low-k dielectric material. The failure times follow a bimodal lognormal behavior with early and late failures. Moreover, there is evidence of a threshold failure time such that each failure mode is represented by a 3-parameter lognormal distribution. It is found that the threshold failure time scales differently with current density from the median time to failure, which can be explained by considering two components of the electromigration lifetime: one controlled by void nucleation and the other controlled by void growth.

Threshold electromigration failure time and its statistics for Cu interconnects

Integrated circuit chip metallization reliability under use conditions is extrapolated from failure distributions of test structures tested under accelerated conditions. Lognormally plotted electromigration failure time distributions for via/line contact configurations with no redundant conductive path usually display two features that are different from failure time distributions for configurations that have well-defined redundant conductive paths. First, the failure times are more widely distributed (larger standard deviation or σ), and second, the left portion of the distribution (early failures) bends downward (if the sample size is large enough) as the failure times become shorter, in contrast to the straight line behavior that is usually observed for structures with good redundancy. The downward deviation from a straight line distribution erodes the goodness of fit relative to the commonly used two-parameter (t50,σ) lognormal distribution model, and the large σ produces a lifetime projection under u...

Thermal cycle reliability of stacked via structures with copper metallization and an organic low-k dielectric

The reliability of a stacked via chain stressed under various thermal cycle conditions is described. The chain consists of Cu Dual Damascene metallization with SiLK (trademark of Dow Chemical) as the organic low-k dielectric. Failure analysis indicates that cracks form in the Cu vias during thermal cycle stress. Due to the presence of two failure modes, the thermal cycle statistical behavior is described by a bimodal lognormal failure distribution. The thermal cycle lifetime exhibits a strong dependence on the temperature range and a rather weak dependence, on the maximum temperature in the cycle. Evidence of a threshold temperature range below which thermal cycle fails should not occur as well as a correlation between the test structure yield and reliability are also reported.

The effect of current density, stripe length, stripe width, and temperature on resistance saturation during electromigration testing

Resistance saturation as a function of current density, stripe length, stripe width, and temperature is investigated for a two-level structure with Ti/AlCu/Ti/TiN stripes and interlevel W stud vias. A simple model based on first principles is presented, which relates the maximum fractional resistance change to the current density and stripe length. Experimental results for stripe lengths of 30, 50, 70, and 100 μm are in good agreement with the model predictions. Estimated void sizes based on the resistance saturation data are consistent with the actual void sizes determined from scanning electron microscopy analysis. A weak temperature dependence is found for 0.33 μm-wide samples in the range 170–250°C, while a strong width dependence is observed between 0.33 and 1.50 μm- wide samples. The width dependence is qualitatively explained in terms of a relaxed bulk modulus that depends on the aspect ratio of the interconnect lines.

Paradoxical predictions and a minimum failure time in electromigration

A paradox arises when the two‐parameter log‐normal distribution is used to predict early electromigration lifetimes of a two‐level structure with Ti–AlCu–Ti stripes and interlevel W stud‐vias. The paradox is a direct consequence of the observed increase in the log‐normal sigma (σ) as the current density decreases and/or as the maximum allowed resistance change increases. The increase in σ implies that the first failures from equal and large sample sizes are expected to occur at low current densities rather than at high current densities. Similarly, for example, samples at relatively low cumulative failure are expected to fail at high levels of resistance change before failing at low levels of resistance change. This apparent paradox is resolved by testing a large set of samples and fitting the failure data to the three‐parameter log‐normal distribution. The third parameter, an incubation time or a minimum time required before failure can occur, is shown to increase as the maximum allowed resistance change...

Minimum Void Size and 3-Parameter Lognormal Distribution for EM Failures in Cu Interconnects

Broad failure time distributions were observed for line depletion electromigration in Cu interconnects for various structures without sufficient liner contact and via redundancy. The root cause for this behavior was identified as the sensitivity of failure times to the void size, shape and location. Application of the traditional 2-parameter lognormal distribution model to corresponding stress data often results in very pessimistic EM lifetime projections. A 3-parameter lognormal distribution was found not only to fit the experimental data better, especially for the early portion of the failure time distributions, but also to generate more accurate lifetime projections for void-size-limited EM. Given the nature of EM wear-out, deeper consideration indicates that a 3-parameter lognormal distribution has a sounder physical basis than a 2-parameter lognormal distribution. The new parameter introduced in the model, the minimum failure time (X0 ), scales with via size over several technology generations, further validating the minimum void size explanation

Application of three-parameter lognormal distribution in EM data analysis

The three-parameter lognormal distribution has been demonstrated for applications in electromigration data analysis, especially for Cu interconnect structures with insufficient redundancy. Examples are given on estimating parameter values from experimental data using the maximum likelihood method. Detailed analyses are presented on confidence bound estimations of the parameters and their propagation to lifetime projections.