Gunda Beernink

Transistor device comprising an embedded semiconductor alloy having an asymmetric configuration

Transistor with Embedded Strain-Inducing Material and Dummy Gate Electrodes Positioned Adjacent to the Active Region

SiGe channels for VT control of high-k metal gate transistors for 32 nm complementary metal oxide semiconductor technology and beyond

Formation of a channel semiconductor alloy by forming a hard mask layer stack and applying a plasma-based mask patterning process

ADJUSTING OF STRAIN CAUSED IN A TRANSISTOR CHANNEL BY SEMICONDUCTOR MATERIAL PROVIDED FOR THRESHOLD ADJUSTMENT

Complementary Transistors Comprising High-K Metal Gate Electrode Structures and Epitaxially Formed Semiconductor Materials in the Drain and Source Areas

Sophisticated Gate Electrode Structures Formed by Cap Layer Removal with Reduced Loss of Embedded Strain-Inducing Semiconductor Material

Performance enhancement in transistors by providing an embedded strain-inducing semiconductor material on the basis of a seed layer

Transistors with embedded strain-inducing material formed in cavities provided by an oxidizing etch process

Control of topography and morphology for channel SiGe by in-situ HCl etching for future CMOS technologies with high-K metal gate