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Dive into the research topics where Gunter Grasshoff is active.

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Featured researches published by Gunter Grasshoff.


IEEE Transactions on Semiconductor Manufacturing | 2005

A novel approach for the patterning and high-volume production of sub-40-nm gates

Karla Romero; Rolf Stephan; Gunter Grasshoff; Martin Mazur; Hartmut Ruelke; Katja Huy; Jochen Klais; Sarah N. McGowan; Srikanteswara Dakshina-Murthy; Scott Bell; Marilyn I. Wright

A novel approach for the patterning and manufacturing of sub-40-nm gate structures is presented. Rather than using resist or an inorganic hardmask as the patterning layer, this gate patterning scheme uses an amorphous carbon (a:C) and cap hardmask to pattern small gates. Healthy and manufacturable gate lengths have been achieved below 35 nm with this scheme, and the potential exists for further extendibility.


Proceedings of SPIE | 2007

Minimizing poly end cap pull back by application of DFM and advanced etch approaches for 65nm and 45 nm technologies

Russell Rosaire Austin Callahan; Gunter Grasshoff; Stefan Roling; Joseph Shannon; Asuka Nomura; Sarah N. McGowan; Cyrus E. Tabery; Karla Romero

As feature sizes decrease and the overall design shrinks, it is becoming increasingly difficult to reliably pattern gate line ends, or poly end caps, so that they are able to extend over to the field area without bridging into an adjacent feature. Furthermore, the trimming of the lines during the gate etch process is necessary due to the desire to decrease the poly length. However, the line end is also trimmed while trimming the gate sidewall, often at higher rates than the sidewall itself. This investigation focuses on decreasing the poly line end pullback, defined as the tip of the gate past active, using lithography techniques and advanced etch approaches for the 65 nm and 45 nm nodes.


Archive | 2008

Cmos device having gate insulation layers of different type and thickness and a method of forming the same

Andy Wei; Andrew Waite; Martin Trentzsch; Johannes Groschopf; Gunter Grasshoff; Andreas Ott


Archive | 2003

Method of adjusting etch selectivity by adapting aspect ratios in a multi-level etch process

Christoph Schwan; Gunter Grasshoff; Volker Grimm


Archive | 2006

Method for forming embedded strained drain/source regions based on a combined spacer and cavity etch process

Andreas Hellmich; Gunter Grasshoff; Fernando Koch; Andy Wei; Thorsten Kammler


Archive | 2003

Method of forming a substrate contact for an SOI semiconductor device

Christoph Schwan; Matthias Schaller; Gunter Grasshoff


Archive | 2012

ENHANCING INTEGRITY OF A HIGH-K GATE STACK BY PROTECTING A LINER AT THE GATE BOTTOM DURING GATE HEAD EXPOSURE

Sven Beyer; Frank Seliger; Gunter Grasshoff


Archive | 2007

CMOS-Bauelement mit Gateisolationsschichten mit unterschiedlicher Art und Dicke und Verfahren zur Herstellung

Andy Wei; Andrew Waite; Martin Trentzsch; Johannes Groschopf; Gunter Grasshoff; Andreas Ott


Archive | 2002

System and method for wafer-based controlled patterning of features with critical dimensions

Gunter Grasshoff; Carsten Hartig


Archive | 2003

Signal layer for generating characteristic optical plasma emissions

Gunter Grasshoff; Christoph Schwan; Matthias Schaller

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Sven Beyer

Advanced Micro Devices

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