H. Reichl

Life cycle inventory analysis and identification of environmentally significant aspects in semiconductor manufacturing

Intrinsically, semiconductor fabrication processes contain expensive and environmentally sensitive processes. The high purity requirements of input materials coupled with the extreme cleanliness of the processing environment provide a great challenge in managing the potential environmental impacts of this industry. High energy and water consumption and the throughput of hazardous auxiliaries give rise to additional environmental concerns. This paper presents a methodology for a life cycle inventory analysis (LCI) employed for a Motorola wafer fab. The LCI focuses on the generation of a complete data set of mass and energy flows for a wafer fab and the identification of environmentally significant aspects in wafer processing. Process modules within the infrastructure and the fab processes are identified as environmentally significant according to the consumption of energy, raw water, chemicals, gases and the origin of waste, wastewater, and emissions. The use of infrastructure facilities by fab processes is taken into account. The practical methodology worked out by Fraunhofer IZM and Motorola is a guideline to combine ecological and economical aspects and can be applied to realize environmental improvements within a company. The LCI data set is a basis for an impact assessment to gain LCA data for one of the most important processes in semiconductor fabrication. Corresponding methodologies for impact assessments are discussed.

High temperature potential of flip chip assemblies for automotive applications

Flip chip technology has been widely accepted within microelectronics as a technology for maximum miniaturization. Typical applications today are mobile products as cellular phones or GPS devices. The upper temperature limits for such applications range from 80 /spl deg/C to a maximum of 125 /spl deg/C. To widen the application range of flip chip technology and to address the volume market of automotive and industrial electronics, the development of high temperature capable assemblies is crucial. Typical scenario for the integration of electronics into a car is a control unit in the engine compartment, where ambient temperatures are around 150 /spl deg/C, package junction temperatures may range from 175 /spl deg/C to 200 /spl deg/C and peak temperature may exceed these values. When using flip chip technology under high temperature conditions, major challenges are found in the application of interconnect media and supporting polymers. At elevated temperatures, the intermetallic phase formation of lead-free solders might lead to a reliability decrease, where polymeric materials as substrate and encapsulant do potentially show mismatched thermo-mechanical properties or material degradation and thus reliability is reduced. Literature does typically describe flip chip technologies behavior on organic substrates for consumer applications, but almost no information is available on the performance at temperatures beyond 125 /spl deg/C. Within the European project HOTCAR, dealing with high temperature electronics for automotive use in general, a German consortium consisting of an IC manufacturer (IFX), two technology users (Siemens VDO & Temic) and a research institute (Fraunhofer IZM) have cooperated to evaluate the high temperature potential of lead-free flip chip technology for automotive applications. According to automotive demands, an experimental study on the suitability of advanced Underfill encapsulants for high temperature has been performed. With the outcome of this pre-study, two promising underfill materials were selected and used in a test run with an automotive test vehicle. This comprises an automotive grade /spl mu/Controller mounted on a substrate manufactured according to automotive standards, as the major system components. Solder material used was SnAg with a Ni UBM in combination with two different substrate finishes NiAu and immersion Sn. These test devices were submitted to temperature cycles according to automotive specifications with a maximum temperature of 150 /spl deg/C. Intermetallic phase formation was studied after high temperature storage by cross sections and shear tests. Typical failure modes for flip chip failure have been identified and are described in detail. The experimental reliability investigations were backed by thermo-mechanical simulations. Taking advantage of the so-called submodelling technique, the solder joint behavior could be studied in detail for lead-free solders. Starting stress-free at 150 /spl deg/C, the calculations followed the real thermal cycling regime. As primary results, the accumulated equivalent creep strain and creep strain energy distributions were obtained. Based on Manson-Coffin-coefficients from recent experiments at IZM, mean cycles to failure (MCF) have been estimated for solder joint fatigue and compared with observed failure. In summary, a status of the high temperature potential of lead-free flip chip technology under automotive conditions is given and a first design guideline for high temperature automotive flip chip applications is provided.

Duromer MID technology for system in package generation

The Duromer molded interconnect device (MID) technology for realization of a stackable system-in-package (SiP) is similar to conventional MID technology, which is usually real- ized using thermoplastic polymers, combining the functionality of housing and substrate into one device. Advantages of the conventional MID technology are the reduction of parts during assembly by integrating mechanical and electrical function- ality into a device and the reduction of space, as MID allows a three-dimensional (3-D) integration of devices. A disadvantage of conventional technology, especially if combined with typical technical thermoplastics, is the large mismatch in coefficient of thermal expansion (CTE) between substrate and advanced microelectronic components as chip scale package (CSP) or flip-chip. This is reducing the applicability of thermoplastic MID to moderate temperature ranges and/or to rather robust components. To overcome this disadvantage, the use of low CTE duromer as epoxy molding compounds (EMCs) as base material for device assembly is proposed, generating a unique technology well adapted to SiP and microelectromechanical system (MEMS) packaging needs, the Duromer MID approach. The technological realization of Duromer MID uses conventional backend processes as IC bonding to flex, transfer molding using epoxy molding compounds, laser machining, metallization, and structurization processes well known from PCB processing. The use of existing equipment allows both a rather fast process implementation and a cost-effective manufacturing of the components. Within this paper, the investigations described previously are driven further toward a description of a generic packaging technology integrating detailed analysis of metallization processes and assembly issues. Summarized, this paper presents further process development and feasibility analysis of wafer-level packaging technologies for SiP solutions based on a Duromer MID approach. Index Terms—Duromer molded interconnect device (MID), en- capsulation, laser structuring, metallization, nano-enhanced mate- rials, system in package (SiP), three-dimensional (3-D) packaging, wafer-level packaging.

Green MST design from a designer's perspective: how to base decisions on environmental issues

Eco-design is a frequently applied concept, but mostly as a case study or based on a given product, which has to be improved. Rarely design for environment is used as part of the development of a new product, because environmental assessments usually need a sound data basis; see e.g. common life cycle analysis concepts. Hence, this paper presents an integrated approach, how to deal with environmental issues during product design, when knowledge about the later product is still fairly limited - and the possibility to implement major changes is still given. The approach presented focuses on lean and smart measures, which work without additional extensive data acquisition and scenarios. However, they impose uncertainties, but remain applicable for the designer. This approach is shown for one of the most advanced tasks in electronics: Design of micro systems technology (MST) devices, known also as micro electro mechanical systems (MEMS). Furthermore, overlaps with other disciplines, such as microelectronics design is inevitable.

Film Coating - Large Area Encapsulation Process for Electronics Packaging

For improved reliability of microelectronics an encapsulation of sensitive structures is crucial, this is true especially for polymer electronics, where oxygen diffusion and water vapor ingress do dramatically influence the electrical performance. For the protection of semiconducting polymers within organic LEDs a glass layer is the method of choice, providing optimized sealing except for the edge areas. Disadvantage of glass as a sealing material is its rigidity and its sensitivity against mechanical stress. For the realization of low cost applications as smart labels / RF ID tags besides barrier properties also mechanical protection is needed to ensure device functionality. This is especially true when these devices need to operate within harsh environment. Various approaches are possible to apply such barrier layers, typically CVD/PVD or spin coating are used, to yield thin, homogeneous layers of encapsulants of 1 to 5 μm thickness. For the high speed encapsulation of large areas also lamination is discussed, where multilayer films are applied using temperature and pressure, layer thickness is in the range of 5 to 30 μm. As a further technology, suited for the deposition of low viscosity liquid barrier materials, film coating processes are proposed. Focus of the technology development described is the application of homogeneous coating on large areas. Expected advantage is the contactless application at high speed on large area substrates, especially useful on substrates showing a 3D topography, as present with devices integrating heterogeneous structures as organic semiconductors (OSC), printed passives or coils.

X-free mobile electronics-strategy for sustainable development

Worldwide information exchange and availability, communication without limits will become basic needs of future generations. The information and communication technologies do not only serve for realizations of these aims they also have a high potential to contribute to a sustainable development. Though, there are critical ecological, social, economic and cultural trends which cannot be ignored and which may cause adverse effects on sustainability. In this paper the ecological dimension of sustainability will be particularly considered. The vision of sustainable mobile products should be based on closed product and material loops without emission of pollutants. Important steps for transition from todays to sustainable products are described in this context.