H. W. Chen

Current conduction of 0.72 nm equivalent-oxide-thickness LaO/HfO2 stacked gate dielectrics

Metal-oxide-semiconductor capacitors (MOSCs) incorporating atomic layer deposited (ALD) LaO/HfO2 stacked gate dielectrics were fabricated, where the equivalent oxide thickness (EOT) of the high-k dielectrics is only 0.72 nm and the gate leakage (Jg) is as low as 6.8×10−2 A/cm2. Based on the analysis of the temperature dependence of the gate leakage current from 300 to 500 K, the main current conduction is found to be Schottky emission or Poole–Frankel emission. Moreover, the barrier height (ΦB) at TaC and HfLaO interface is estimated to be about 1.21 eV, and the trap energy level (Φt) is about 0.51 eV.

The influence of Hf-composition on atomic layer deposition HfSiON gated metal-oxide-semiconductor field-effect transistors after channel-hot-carrier stress

Metal–oxide–semiconductor field-effect transistors (MOSFETs) incorporating hafnium-silicate (HfSiON) dielectrics with different compositions have been fabricated and their hot-carrier injection (HCI) reliability has also been investigated. The experimental results reveal that the HCI degradation of atomic layer deposition (ALD) HfSiON gate dielectrics is minimized at Hf : Si = 1 : 3. Moreover, the experimental results also show that the increment of oxide trapped charges (ΔNot) depends on Hf content and is about one order of magnitude larger than that of interface traps (ΔNit) after channel-hot-carrier (CHC) stress. Finally, some important interfacial parameters, including ΔNit, ΔDit, and ΔNot, have also been characterized through the charge pumping (CP) technique.

Current conduction mechanisms of 0.65 nm equivalent oxide thickness HfZrLaO thin films

Metal-oxide-semiconductor (MOS) capacitors incorporating atomic-layer-deposited (ALD) LaO/HfZrO stacked gate dielectrics were fabricated. The experimental results reveal that the equivalent oxide thickness (EOT) is 0.65 nm, and the gate leakage current density (Jg) is only 1.9 A/cm2. The main current conduction mechanisms are Schottky emission, Poole-Frankel emission, and Fowler-Nordheim tunneling. The barrier height (ΦB) is estimated to be about 1.07 eV at TaC and HfZrLaO interface.

The influence of physical and electrical properties in HfO 2 thin film with different lanthanum doping position

In this paper, La-incorporated with HfO2 thin films increase crystallization temperature which of thin films is observed from X-ray diffraction (XRD). By nano-Auger analysis, the results show that the Hf atom out-diffusion into Si substrate is increased when the La dopant in the upper layer. The out-diffusion of Hf also affects the thickness of silicate. It is suggested to be the origin of leakage current. The physical and electrical properties of different positions of La were measured and compared in this work.

Interface Characterization of CeO2-Gated MOSFETs Using Gated Diode Method and Charge Pumping Technique

Metal-oxide-semiconductor field-effect transistors (MOSFETs) incorporating CeO2 dielectrics were fabricated and investigated. In this work, the interfacial and electrical properties of CeO2/Si were characterized by gated-diode method and charge pumping technique. The lowest density of interface traps per area and energy (Dit) of CeO2/Si interface in comparison with other high-k material is about 7.3×1010 cm-2-eV-1 due to the very low lattice mismatch at CeO2/Si interface. The density of interface trap per area (Nit) determined using gated diode method is 6×109 cm-2. The minority carrier lifetime (tFIJ), the effective capture cross section of surface state (αs) and surface recombination velocity (so) extracted using gated-diode method are 4.09×10-8 s, 7.14×10-14 cm2 and 4310 cm/s, respectively. Furthermore, a comparison with MOSFETs using the other high-k materials as gate dielectrics was also made.