Hau-Yu Lin

Influences of surface reconstruction on the atomic-layer-deposited HfO2/Al2O3/n-InAs metal-oxide-semiconductor capacitors

We report the characteristics of HfO2/Al2O3/n-InAs metal-oxide-semiconductor capacitors on different reconstructed surface InAs substrates. The HfO2/Al2O3 gate dielectric films deposited on InAs were used to study the interfacial reaction. Compared with (2×4)-surface sample, improvements of capacitance-voltage characteristics for (1×1)-surface sample with lower frequency-dependent capacitance dispersion and higher inversion capacitance are attributed to lower indium composition and less arsenic oxide at Al2O3/InAs interface, as confirmed by x-ray photoelectron spectroscopy. It indicates that the equivalent dangling bond of cations and anions on (1×1)-surface sample tends to avoid the oxidization process and become less pinning.

Self-aligned contact metallization technology for III-V metal-oxide-semiconductor field effect transistors

The demonstration of a salicidelike self-aligned contact technology for III-V metal-oxide-semiconductor field-effect transistors (MOSFETs) is reported. A thin and continuous crystalline germanium-silicon (GeSi) layer was selectively formed on n+ doped gallium arsenide (GaAs) regions by epitaxy. A new self-aligned nickel germanosilicide (NiGeSi) Ohmic contact with good morphology was achieved using a two-step annealing process with precise conversion of the GeSi layer into NiGeSi. NiGeSi contact with the contact resistivity (ρc) of 1.57 Ω mm and sheet resistance (Rsh) of 2.8 Ω/◻ was achieved. The NiGeSi-based self-aligned contact technology is promising for future integration in high performance III-V MOSFETs.

Ge Epitaxial Growth on GaAs Substrates for Application to Ge-Source/Drain GaAs MOSFETs

Ge films were epitaxially grown on GaAs(100) substrates and Ga 0.88 In 0.12 As(100) virtual substrates using an ultrahigh vacuum/ chemical vapor deposition system. The incubation time of Ge growth depends on Ga(In)As surfaces that were processed by different wet chemical solutions. Growth behaviors, such as island growth at the initial stages and selective growth into recessed regions of GaAs, were studied by transmission electron microscopy. To test the quality of Ge grown on GaAs, an n + -Ge/p-GaAs diode was fabricated. We propose that through Ge selective epitaxial growth, Ge can be used as the source-drain of a GaAs metal-oxide-semiconductor field-effect transistor (MOSFET) to overcome some intrinsic limitations of this device.

III–V MOSFETs with a new self-aligned contact

We report the first demonstration of III–V n-MOSFETs with self-aligned contact technology. The self-aligned contact was formed using a salicide-like process which is compatible with CMOS process flow. A new epitaxy process was developed to selectively form a thin continuous germanium-silicon (GeSi) layer on gallium arsenide (GaAs) source and drain (S/D) regions. Nickel was deposited and annealed to form NiGeSi, and unreacted metal was removed. A second anneal diffuses Ge and Si into GaAs to form heavily n+ doped regions, and a novel self-aligned nickel germanosilicide (NiGeSi) ohmic contact was achieved. MOSFETs with the new self-aligned metallization process were realized.

The Annihilation of Threading Dislocations in the Germanium Epitaxially Grown within the Silicon Nanoscale Trenches

We investigated the selective growth of germanium into nanoscale trenches on silicon substrates. These nanoscale trenches, the smallest size of which was 50 nm, were fabricated using the state-of-the-art shallow trench isolation technique. The quality of the Ge films was evaluated using transmission electron microscopy. The formation of threading dislocations (TDs) was effectively suppressed when using this deposition technique. For the Ge grown in nanoscale Si areas (e.g., several tens of nanometers), the TDs were probably readily removed during cyclic thermal annealing predominantly because their gliding distance to the SiO 2 sidewalls was very short. Therefore, nanoscale epitaxial growth technology can be used to deposit Ge films on lattice-mismatched Si substrates with a reduced defect density.

In 0.7 Ga 0.3 As channel n-MOSFETs with a novel self-aligned Ni-InGaAs contact formed using a salicide-like metallization process

Spacer-less In0.7Ga0.3As n-MOSFETs with self-aligned Ni-InGaAs contacts formed using a direct reaction between Ni and InGaAs were demonstrated. A novel salicide-like metallization process was developed to achieve self-aligned Ni-InGaAs contacts, comprising the steps of Ni reaction with InxGa1−xAs and selective removal of excess Ni. Dopantless n-MOSFETs with metallic Ni-InGaAs source/drain (S/D) and n-MOSFETs with Si-doped S/D and Ni-InGaAs contacts were compared. Si implant performed before the metallization effectively suppressed the off-state current IOFF by more than 10 times.

In 0.53 Ga 0.47 As MOSFETs with high channel mobility and gate stack quality fabricated on 300 mm Si substrate

In_0.53Ga_0.47As channel MOSFETs were fabricated on 300 mm Si substrate. The epitaxial In_0.53Ga_0.47As channel layer exhibits high Hall electron mobility comparable to those grown on lattice matched InP substrates. Excellent device characteristics (SS~95 mV/dec., I_on/I_off ~10⁵, DIBL ~51 mV/V at V_ds = 0.5V for L_g=150 nm device) with good uniformity across the wafer were demonstrated. The extracted high field effect mobility (μ_EF = 1837 cm²/V-s with EOT ~ 0.9 nm) is among the highest values reported for surface channel In_0.53Ga_0.47As MOSFETs.

A new self-aligned contact technology for III-V MOSFETs

We report the first demonstration of a self-aligned contact technology for III-V MOSFETs. A novel epitaxy process with insitu surface treatment was developed to selectively form a thin continuous germanium-silicon (GeSi) layer on gallium arsenide (GaAs) source and drain (S/D) regions. By precisely and fully converting the GeSi layer into NiGeSi, while diffusing Ge and Si into GaAs to form heavily n+ doped regions, a novel self-aligned nickel germanosilicide (NiGeSi) ohmic contact was achieved. This is expected to significantly enhance the performance of III-V MOSFETs.