Hideki Naruoka
Renesas Electronics
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Publication
Featured researches published by Hideki Naruoka.
Journal of Applied Physics | 2005
Akira Uedono; Nobuyoshi Hattori; Hideki Naruoka; Shoji Ishibashi; Ryoichi Suzuki; Toshiyuki Ohdaira
Vacancy-type defects in strained-Si layers deposited on Si0.75Ge0.25∕graded-SiGe∕Si structures were probed by using monoenergetic positron beams. The Doppler broadening spectra of the annihilation radiation and the lifetime spectra of the positrons were measured for samples before and after annealing (800–1050 °C). For an as-received sample, the defects in the strained-Si layer were identified as vacancy-type defects coupled with Ge. The mean open size of these defects was estimated to be close to that of a divacancy. The line-shape parameter, S, corresponding to the positron annihilation in the strained-Si layers decreased with increasing annealing temperature, but no large change in the positron lifetime was observed. From a comparison between the Doppler broadening profiles for the strained-Si films and those calculated using the projector augmented-wave method, it was found that the number of Ge atoms forming a complex by coupling with a defect increased with increasing annealing temperature. The numb...
IEEE Electron Device Letters | 2002
Haruhiko Yoshida; Toshinori Takami; Takayuki Uchihashi; Seigô Kishino; Hideki Naruoka; Yoji Mashiko
A novel scanning charge-pumping method using one or more extra contactless gates is proposed for silicon-on-insulator (SOI) wafer inspection. In the proposed method, a contactless; gate electrode is used as a measuring gate instead of the permanent gate electrode of normal metal-oxide-semiconductor transistors, allowing a wafer map of interface trap density to be obtained. A preliminary study is carried out using a sample device having two extra gate electrodes in the close vicinity of a measuring gate electrode, which are contacted on an oxidized SOI wafer. The results demonstrate that the proposed method is a promising technique for the characterization of interface trap density in SOI wafers.
Archive | 2002
Thierry Barge; Bruno Ghyselen; Toshiaki Iwamatsu; Hideki Naruoka; Junichiro Furihata; Kiyoshi Mitani
Archive | 2003
Yoshiko Yoshida; Hideki Naruoka; Yasuhiro Kimura; Yasuo Yamaguchi; Toshiaki Iwamatsu; Yuuichi Hirano
Archive | 2000
Thierry Barge; Bruno Ghyselen; Toshiaki Iwamatsu; Hideki Naruoka; Junichiro Furihata; Kiyoshi Mitani
The Japan Society of Applied Physics | 2002
Hideki Naruoka; Toshiaki Iwamatsu; Takashi Ipposhi; Nobuyoshi Hattori; Yasuo Inoue; Yoji Mashiko
The Japan Society of Applied Physics | 2001
Shigenobu Maeda; K. Shiga; Hideki Naruoka; Nobuyoshi Hattori; Toshiaki Iwamatsu; Takuji Matsumoto; Yuuichi Hirano; Yasuo Yamaguchi; Takashi Ipposhi; Shigeto Maegawa; M. Inuishi
Archive | 2001
Toshiaki Iwamatsu; Takashi Ipposhi; Hideki Naruoka; Nobuyoshi Hattori; Shigeto Maegawa; Yasuo Yamaguchi; Takuji Matsumoto
Archive | 2000
Thierry Barge; Bruno Ghyselen; Toshiaki Iwamatsu; Hideki Naruoka; Junichiro Furihata; Kiyoshi Mitani
Archive | 2000
Thierry Barge; Bruno Ghyselen; Toshiaki Iwamatsu; Hideki Naruoka; Junichiro Furihata; Kiyoshi Mitani