Hirohiko Sugahara

Reactively sputtered WSiN film suppresses As and Ga outdiffusion

This paper evaluates reactively sputtered WSiN films as an annealing cap for GaAs substrate. WSiN film successfully suppresses As and Ga outdiffusion. The WSiN/SiO2 /SiN/substrate multilayer annealing cap reconfirms this. As and Ga accumulate in the WSiN/SiO2 interface after annealing at 800 °C for 20 min. The accumulated As peak concentration is estimated to be 1019 atoms/cm3 . X‐ray diffraction shows WSiN film remains in an amorphous phase, exhibiting no recrystallized grain boundary. Film stress only changes by one‐half before and after annealing. These characteristics are very different from other refractory metals such as WN and WSi which change from amorphous to crystalline phase after annealing. It is therefore concluded that reactively sputtered WSiN films prevent As and Ga outdiffusion and form a good annealing cap for GaAs.

100-Gb/s multiplexing and demultiplexing IC operations in InP HEMT technology

This paper describes the 100-Gb/s multiplexing operation of a selector IC and demultiplexing operation of a D-type flip-flop (D-FF) using production-level 0.1-/spl mu/m-gate-length InP HEMT IC technology. To boost the operating speed of the selector IC, a selector core circuit directly drives an external 50-/spl Omega/ load, and is included in the output stage. In addition, a test chip containing the selector and a D-FF to confirm error-free operation of these circuits was designed. The fabricated selector IC exhibited clear eye openings at 100 Gb/s, and its error-free operation was confirmed by using the test chip.

Bonding states of chemisorbed sulfur atoms on GaAs

Abstract The chemistry of the S/GaAs system is studied using synchrotron radiation photoemission spectroscopy. Monolayer-order sulfur atoms are successfully chemisorbed on clean n-GaAs (001) surfaces at room temperature by using an Ag/AgI/Ag 2 S/Pt electrochemical cell, which generates an atomic sulfur flux. Photoemission spectra of core levels are measured with a photon energy of about 210 eV before and after annealing at 360°C for 10 min in vacuum. Ga 3d, As 3d, and S2p spectra indicate that Ga-S and As-S bonds are formed on the as-chemisorbed GaAs surfaces at room temperature, and that Ga-S bonds become dominant after annealing at 360°C. These results are the same as for the (NH 4 ) 2 S x -treated n-GaAs surfaces. It is found that the Ga-S bonding formation is the key for passivating GaAs surfaces for both sulfur-chemisorbed and (NH 4 ) 2 S x -treated GaAs.

A 150-GHz dynamic frequency divider using InP/InGaAs DHBTs

An ultrahigh-speed frequency divider IC using InP/InGaAs DHBTs was developed. A clocked-inverter feed-forward toggle flip-flop is employed in the IC. The maximum measurement frequency of the IC is 150 GHz. To the best of our knowledge, the operating frequency is fastest frequency divider so far reported.

50-Gbit/s 4-bit multiplexer/demultiplexer chip-set using InP HEMTs

This paper reports on the 50-Gbit/s 4:1 multiplexer (MUX) and 1:4 demultiplexer (DMUX) chip-set using InP HEMTs. In order to achieve high and wide-range bit-rate operation, timing design inside the ICs was precisely executed. The packaged MUX and DMUX achieved 50 Gbit/s back-to-back error-free operation for 2/sup 31/-1 pseudo-random bit streams (PRBS). Furthermore, the MUX operated from 4 to 50 Gbit/s with >1 V/sub pp/ output amplitude, and the DMUX exhibited >180-degrees phase margin from 4 to 50 Gbit/s for 2/sup 31/-1 PRBS.

Photoreceiver module using an InP HEMT transimpedance amplifier for over 40 gb/s

We developed a photoreceiver module for over 40 Gb/s that uses two ultrahigh- speed device technologies: an InP HEMT transimpedance amplifier (TIA) and a uni-traveling-carrier photodiode (UTC-PD). The TIA was designed to have a wide dynamic range by using cascade HEMT topology for the output buffer. We found that reducing the standing wave at the PD-TIA interface by decreasing the change of arg(S/sub 11/) of the TIA within the required frequency region is important for increasing the bandwidth of the module. We obtained a minimum sensitivity of -7.6 dBm and a dynamic range of 11 dB for 43-Gb/s nonreturn-to-zero optical input signal. Error-free operation of the module was confirmed at a data rate of 50 Gb/s.

Low-power InP-HEMT switch ICs integrating miniaturized 2/spl times/2 switches for 10-Gb/s systems

This paper presents a wideband cold-FET switch with virtually zero power dissipation. The use of InP HEMTs with a low R/sub on//spl middot/C/sub off/ product enables us to configure a DC-to-over-10-GHz single-pole double-throw (SPDT) switch without using a shunt FET. The series-FET configuration offers a logic-level-independent interface and makes possible positive control voltage operation in spite of using depletion-mode FETs. A miniaturized 2/spl times/2 switch using two SPDT switches yields an insertion loss of less than 1.16 dB and isolation of more than 21.2 dB below 10 GHz, which allows us to increase the scale of the switch in a single chip easily. The add-drop operation combining two 2/spl times/2 switches in a single chip and a 4/spl times/4 switch IC integrating four 2/spl times/2 switches are presented. The packaged ICs achieve error-free operation up to 12.5 Gb/s with either positive or negative logic-level input. Extremely fast switching of /spl sim/140 ps is also successfully demonstrated.

50-gbit/s InP HEMT 4 : 1 multiplexer/1 : 4 demultiplexer chip set with a multiphase clock architecture

A 50-Gbit/s InP high electron-mobility transistor (HEMT) chip set of 4 : 1 multiplexer (MUX) and 1 : 4 demultiplexer (DMUX) integrated circuits (ICs) with a multiphase clock (MPC) architecture is described. The MPC architecture employs a quarter-rate four-phase clock generated by a toggle flip-flop inside the ICs, which reduces the number of circuit elements and lowers the power consumption. The fabricated 4 : 1 MUX and 1 : 4 DMUX ICs exhibited 50-Gbit/s error-free operations for 2/sup 31/-1 pseudorandom bit sequences with 1.71- and 1.42-W power consumption, respectively. Compared to conventional tree-type 4 : 1 MUX and 1 : 4 DMUX ICs using InP HEMTs, the MPC 4 : 1 MUX and 1 : 4 DMUX ICs operate at the same operating speed with less than one-third power consumption.

1-km transmission of 10 Gbit/s optical signal over legacy MMF using mode limiting transmission and incoherent light source

10 Gbit/s optical signals were transmitted through legacy multimode fibers (MMF) by using mode limiting and incoherent light sources. Stable transmission through a 1-km-long MMF was realized by inserting a singlemode fiber (SMF) at midpoint.

1.4-W 50-Gbit/s InP HEMT 1:4 demultiplexer IC with a multi-phase clock architecture

High-speed and low-power operation of a 1:4 demultiplexer IC with a multi-phase clock (MPC) architecture is reported. The architecture features four parallel latch lines and a toggle flip-flop (TFF) that generates a four-phase clock. The IC, which was fabricated using InP HEMTs, exhibited 50-Gbit/s error-free operation with a power consumption of 1.42 W. Compared to a conventional tree-type InP HEMT 1:4 demultiplexer IC, the IC with the MPC architecture operates at the same operating speed with only one-quarter the power consumption.