Network


Latest external collaboration on country level. Dive into details by clicking on the dots.

Hotspot


Dive into the research topics where Hirotsugu Kajihara is active.

Publication


Featured researches published by Hirotsugu Kajihara.


symposium on vlsi circuits | 2012

A −70dBm-sensitivity 522Mbps 0.19nJ/bit-TX 0.43nJ/bit-RX transceiver for TransferJet™ SoC in 65nm CMOS

Daisuke Miyashita; Kenichi Agawa; Hirotsugu Kajihara; Kenichi Sami; Masaomi Iwanaga; Yosuke Ogasawara; Tomohiko Ito; Daisuke Kurose; Naotaka Koide; Toru Hashimoto; Hiroki Sakurai; Takafumi Yamaji; Takashi Kurihara; Kazumi Sato; Ichiro Seto; Hiroshi Yoshida; Ryuichi Fujimoto; Yasuo Unekawa

TransferJet™ is an emerging high-speed close-proximity wireless communication standard, which enables a data transfer of up to 522Mbps within a few centimeters range. We have developed a fully integrated TransferJet SoC with a 4.48-GHz operating frequency and a 560-MHz bandwidth (BW) using 65nm CMOS technology. Baseband filtering techniques for both a transmitter (TX) and a receiver (RX) are proposed to obtain a sensitivity of -70dBm with low power consumption. The SoC achieves an energy per bit of 0.19nJ/bit and 0.43nJ/bit for the TX and the RX, respectively, We have also built the worlds smallest module prototype using the SoC, which is suitable for small mobile devices.


2011 IEEE Cool Chips XIV | 2011

A 7uW deep-sleep, ultra low-power WLAN baseband LSI for mobile applications

Daisuke Taki; Tatsuo Shiozawa; Kuniaki Ito; Youichiro Shiba; Kouji Horisaki; Hirotsugu Kajihara; Toshiyuki Yamagishi; Masahiro Sekiya; Akira Yamaga; Tetsuya Fujita; Hiroyuki Hara; Masanori Kuwahara; Toshio Fujisawa; Yasuo Unekawa

Low power IEEE 802.11n single input single output (SISO) wireless LAN (WLAN) baseband LSI has been developed for mobile applications. The multiple low power technologies such as on-chip power gating and high throughput technologies for expanding idle time are applied to the LSI. By minimizing always-on circuits and implementing them using thick gate-oxide transistors, 7uW stand-by power consumption is achieved with negligible shutdown/restart transition time. The built-in wake-up timer and on-chip CPU enables continuous transmit/receive operation without an external intervention.


Archive | 2008

Wireless communication receiving device and wireless communication system

Hirotsugu Kajihara


Archive | 2013

Power transmitter, power receiver and power transmission and reception system

Hirotsugu Kajihara; Tomoya Horiguchi; Ichiro Seto; Toshiki Miyasaka; Yoshinari Kumaki; Kiyoshi Toshimitsu


Archive | 2007

SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND ITS CIRCUIT INSERTING METHOD

Hirotsugu Kajihara


Archive | 2009

Hardware engine control apparatus having hierarchical structure

Hirotsugu Kajihara


Archive | 2007

Semiconductor integrated circuit device preventing logic transition during a failed clock period

Hirotsugu Kajihara


IEICE Transactions on Electronics | 2013

A -70 dBm-Sensitivity 522 Mbps 0.19 nJ/bit-TX 0.43 nJ/bit-RX Transceiver for TransferJet TM SoC in 65 nm CMOS

Daisuke Miyashita; Kenichi Agawa; Hirotsugu Kajihara; Kenichi Sami; Ichiro Seto; Ryuichi Fujimoto; Yasuo Unekawa


Archive | 2007

RECEIVER AND COMMUNICATION SYSTEM

Hirotsugu Kajihara


international solid-state circuits conference | 2018

An 802.11ax 4×4 spectrum-efficient WLAN AP transceiver SoC supporting 1024QAM with frequency-dependent IQ calibration and integrated interference analyzer

Shusuke Kawai; Hiromitsu Aoyama; Rui Ito; Yutaka Shimizu; Mitsuyuki Ashida; Asuka Maki; Tomohiko Takeuchi; Hiroyuki Kobayashi; Go Urakawa; Hiroaki Hoshino; Shigehito Saigusa; Kazushi Koyama; Makoto Morita; Ryuichi Nihei; Daisuke Goto; Motoki Nagata; Kengo Nakata; Katsuyuki Ikeuchi; Kentaro Yoshioka; Ryoichi Tachibana; Makoto Arai; Chen Kong Teh; Atsushi Suzuki; Hiroshi Yoshida; Yosuke Hagiwara; Takayuki Kato; Ichiro Seto; Tomoya Horiguchi; Koichiro Ban; Kyosuke Takahashi

Collaboration


Dive into the Hirotsugu Kajihara's collaboration.

Researchain Logo
Decentralizing Knowledge