Hiroyuki Miyazoe

Carbon Nanotube Complementary Wrap-Gate Transistors

Among the challenges hindering the integration of carbon nanotube (CNT) transistors in digital technology are the lack of a scalable self-aligned gate and complementary n- and p-type devices. We report CNT transistors with self-aligned gates scaled down to 20 nm in the ideal gate-all-around geometry. Uniformity of the gate wrapping the nanotube channels is confirmed, and the process is shown not to damage the CNTs. Further, both n- and p-type transistors were realized by using the appropriate gate dielectric-HfO2 yielded n-type and Al2O3 yielded p-type-with quantum simulations used to explore the impact of important device parameters on performance. These discoveries not only provide a promising platform for further research into gate-all-around CNT devices but also demonstrate that scalable digital switches with realistic technological potential can be achieved with carbon nanotubes.

Effect of annealing on the mobility and morphology of thermally activated pentacene thin film transistors

Pentacene thin film transistors (TFTs) were fabricated by the organic molecular beam deposition method. The TFTs were characterized in order to study the effect of thermal annealing on the morphology and carrier mobility of the transistors. For all the TFT samples the mobility exhibited an Arrhenius relationship with temperature, indicating a thermally activated transport that could be explained by the carrier trap and thermal release transport mechanism. Therefore, in order to investigate the annealing effect, we tested the data for a significant period of time after annealing until the temperature recovered to room temperature, so that the thermal activation effect was screened and possible effects of thermal expansion and stress were also ruled out. As a result, we found that only with a temperature below a critical temperature of approximately 45°C could annealing improve the mobility, while annealing with T>50°C would decrease the mobility compared to the value before annealing. Atomic force microsco...

Graphoepitaxy of sexithiophene on thermally oxidized silicon surface with artificial periodic grooves

Graphoepitaxial growth of a sexithiophene (6T) thin film was achieved on a thermally oxidized silicon surface with artificial periodic grooves. The surface structure was fabricated by electron beam lithography and the thin film was grown by molecular beam deposition. A well-pronounced, in-plane oriented component ([010]6T‖grooves) was identified by grazing incidence x-ray diffraction, though there also existed some randomly oriented 6T grains. Presence of the graphoepitaxial component was also confirmed by results of the orientational analysis of atomic force microscopy images. It was shown that the in-plane orientation control of organic semiconductors is possible using graphoepitaxy.

Sub-30 nm pitch line-space patterning of semiconductor and dielectric materials using directed self-assembly

The authors demonstrate pattern transfer of 29-nm-pitch self-assembled line-space polystyrene-poly(methyl methacrylate) patterns generated by graphoepitaxy into three important materials for semiconductor device integration: silicon, silicon nitride, and silicon oxide. High fidelity plasma etch transfer with production-style reactors was achieved through co-optimization of multilayer masking film stacks and reactor conditions. The authors present a systematic study of the line edge roughness (LER) and line width roughness evolution during pattern transfer. Application of a postetch annealing process shows reduction of the LER of silicon features from around ∼3 nm to less than 1.5 nm. These results further demonstrate that directed self-assembly-based patterning may be a suitable technique for semiconductor device manufacturing.

Pulsed Laser Ablation Synthesis of Diamond Molecules in Supercritical Fluids

Nanocarbon materials have been synthesized by pulsed laser ablation (532 nm; 52 J/cm2; 7 ns; 10 Hz) of highly oriented pyrolytic graphite in adamantane-dissolved supercritical xenon at a temperature T = 290.2 K and pressure p = 5.86 MPa. Micro-Raman spectroscopy of the products revealed the presence of hydrocarbons possessing sp3 hybridized bonds also found in diamond structures. The synthesis of diamantane was confirmed by gas chromatography-mass spectrometry. The same measurements also indicate the possible synthesis of other diamondoids up to octamantane. Thus, laser ablation in supercritical fluids is proposed as one practical method of synthesizing diamondoids.

Scalable and fully self-aligned n-type carbon nanotube transistors with gate-all-around

While proven to provide high performance at sub-10 nm lengths, carbon nanotube (CNT) field-effect transistors (FETs) typically employ impractical gate geometries. Here we demonstrate fully self-aligned CNTFETs that include a gate-all-around (GAA) the nanotube channels - the ideal gate geometry for a 1D CNT. These GAA-CNTFETs have 30 nm channel lengths and exhibit n-type operation with high on-currents and good switching behavior that is explained by quantum transport (NEGF) simulations. This work is an important milestone showing that a technologically relevant self-aligned device can be realized with nanotubes.

Pathway to the piezoelectronic transduction logic device.

The piezoelectronic transistor (PET) has been proposed as a transduction device not subject to the voltage limits of field-effect transistors. The PET transduces voltage to stress, activating a facile insulator-metal transition, thereby achieving multigigahertz switching speeds, as predicted by modeling, at lower power than the comparable generation field effect transistor (FET). Here, the fabrication and measurement of the first physical PET devices are reported, showing both on/off switching and cycling. The results demonstrate the realization of a stress-based transduction principle, representing the early steps on a developmental pathway to PET technology with potential to contribute to the IT industry.

Synthesis of the Higher-Order Diamondoid Hexamantane Using Low-Temperature Plasmas Generated in Supercritical Xenon

Diamondoid molecules were synthesized from adamantane (C10H16) using low-temperature plasmas generated in supercritical xenon. The carbon content of the synthesized materials was verified by energy dispersive X-ray spectroscopy, while micro-Raman spectroscopy measurements confirmed that the synthesized materials contained sp3 bonds, the features in the Raman spectra being similar to those found in the Raman spectra of higher order diamondoids. Mass peaks at m/z = 396 were most abundant and might be attributed to C30H36 isomers of hexamantane. The synthesis of this particular type of diamondoid is explained by the fewer necessary cleavages of C–C bonds or C–H occurring to form the diamondoid.

Development of a dielectric-barrier discharge enhanced microplasma jet

A low-power ultrahigh-frequency-driven inductively coupled microplasma (ICMP) source equipped with dielectric-barrier discharge (DBD) was developed to realize a low-temperature and high-density plasma in fine quartz capillaries with inner diameters of less than 1.0 mm. A stable plasma was generated and its sustainability was independent of the gas flow rate. This plasma jet had a longer plume than that of a thermoelectron-enhanced microplasma jet, and time-resolved characterization suggested interactions between ICMP and DBD jets. By optical emission spectroscopy characterization, the gas temperature and electron density inside a capillary were estimated to be 400–1000 K and 1013–1014 cm−3, respectively.

Pattern transfer of directed self-assembly patterns for CMOS device applications

Abstract. A study on the optimization of etch transfer processes using 200-mm-scale production type plasma etch tools for circuit relevant patterning in the sub-30-nm pitch regime using directed self-assembly (DSA) line–space patterning is presented. This work focuses on etch stack selection and process tuning, such as plasma power, chuck temperature, and end point strategy, to improve critical dimension control, pattern fidelity, and process window. Results from DSA patterning of gate structures featuring a high-k dielectric, a metal nitride and poly Si gate electrode, and a SiN capping layer are also presented. These results further establish the viability of DSA pattern generation as a potential method for Complementary metal–oxide–semiconductor (CMOS) integrated circuit patterning beyond the 10-nm node.