Hisashi Takemura

A 'self-aligned' selective MBE technology for high-performance bipolar transistors

A novel method of preparing high-performance self-aligned silicon bipolar transistors having a Si MBE (molecular beam epitaxy) base layer, called SSSB (super self-aligned selectively grown base) technology, has been developed. An SSSB technology features the simultaneous formation of a facet-free, ultrathin selective silicon epitaxial layer, and a selectively deposited graft base polysilicon film. Under an optimized gas-source MBE process condition, uniform epitaxial growth onto the

Design and performance of traveling-wave tubes using field emitter array cathodes

An X-band miniaturized traveling-wave tube (TWT) using a Spindt field emitter array (FEA) cathode was built. The FEA cathode has 542,000 molybdenum tips in an emission area 1.2 mm in diameter. It also has a trench current-limiter that shows low resistance in normal operation. A saturation output power of 28.2 W, a saturation power gain of 40 dB, and a beam transmission ratio of more than 99.3% have been achieved at a frequency of 11.5 GHz under 3% duty ratio.

Si bipolar chip set for 10-Gb/s optical receiver

Three Si bipolar ICs, a preamplifier, a gain-controllable amplifier, and a decision circuit, have been developed for 10-Gb/s optical receivers. A dual-feedback configuration with a phase adjustment capacitor makes it possible to increase the preamplifier bandwidth up to 11.2 GHz, while still retaining flat frequency response. The gain-controllable amplifier, which utilizes a current-dividing amplifier stage, has an 11.4-GHz bandwidth with 20-dB gain variation. A master-slave D-type flip-flop is also operated as the decision circuit at 10 Gb/s. On-chip coplanar lines were applied to minimize the electrical reflection between the ICs. >

A Si bipolar 21-GHz/320-mW static frequency divider

A silicon bipolar divide-by-eight static frequency divider was developed. A state-of-the-art advanced borosilicate-glass self-aligned (A-BSA) transistor technology that has a cutoff frequency of 40 GHz at V/sub ce/=1 V was applied. Optimum circuit and layout designs were carried out for high-speed/low-power operation. The single-ended input realized by an on-chip metal-insulator-metal (MIM) capacitor makes it easy to use in microwave applications. Ultrahigh-speed operation, up to 21 GHz, was realized, with 320-mW power dissipation from a single +5-V supply. The static frequency divider is a suitable prescaler for phase-locked oscillators (PLOs), completely covering microwave frequencies from L band through Ku band (1-18 GHz). >

A 40 GHz f/sub T/ Si bipolar transistor LSI technology

A high-speed Si bipolar transistor with f/sub T/ (cutoff frequency) of 40 GHz using advanced BSA (BSG self-aligned) technology is described. The advanced BSA technology is characterized by graded profiled collector, buried emitter electrode structure, and 0.8- mu m design rule. The advanced BSA technology for further improving the f/sub T/ performance of the sub-100-nm-deep base transistor has been developed by adding these three technologies to the basic BSA technology, in which chemical vapor deposition (CVD)-BSG film is used as a diffusion source to form the intrinsic base and the p/sup +/-link region and as a sidewall spacer between emitter polysilicon and base polysilicon electrodes. The optimized transistor using the advanced BSA technology has exhibited a cutoff frequency of 38 GHz at V/sub CE/ of 1 V, and ECL (emitter coupled logic) gate delay time of 29 ps at I/sub CS/ of 0.3 mA.<<ETX>>

A Si bipolar 28-GHz dynamic frequency divider

A dynamic frequency divider applying the regenerative frequency division principle has been developed. A spiral inductor on the silicon substrate used as a load is characterized, and an improved one-port model with the substrate resistance is discussed. A 1/16 frequency divider was implemented with a silicon bipolar technology with a cutoff frequency of 40 GHz. The operation frequency range was 11.8-28.1 GHz, covering the Ka band (18-26.5 GHz). The inductive load has improved the maximum operation frequency by 7%, compared with a conventional circuit. Complemented with a 21-GHz static frequency divider previously reported by the authors, the whole microwave frequency range up to 26.5 GHz has been completely covered with the silicon bipolar technology. The maximum operation frequency of a silicon MMIC has been extended to the millimeter-wave frequency region for the first time. >

BSA Technology for sub-100nm deep base bipolar transistors

This paper will describe a novel self-aligned technology, BSA (BSG Self-Aligned) technology. The BSA technology makes it possible to realize the self-aligned bipolar transistors having sub- 100nm deep base junction and to solve the problems in lateral and vertical scaling down of self-aligned transistors. The BSA technology is featured by the use of BSG film not only as a sidewall spacer but also as a diffusion source to form both the intrinsic base and p+-link regions by rapid thermal annealing (RTA), simultaneously. The typical BSA transistor having sub-100nm deep base junction showed 70 of hFE, 7V of BVCEOand 3V of BVEBO, respectively.

A Si bipolar chip set for 10 Gb/s optical receiver

The development of a chip set comprised of analog circuits with a bandwidth exceeding 10 GHz and digital circuits operating at 10 Gb/s are required for a 10-Gb/s direct-detection optical receiver. The best performance to date using Si bipolar technology is a 10-GHz bandwidth preamplifier or a 3.6-GHz bandwidth gain-controllable amplifier. A preamplifier and gain-controllable amplifier with a bandwidth exceeding 10 GHz, and decision circuits operating at 10 Gb/s are achieved by optimized high-speed silicon bipolar circuit blocks, including a dual feedback loop, peaking circuit, and impedance matched buffer to achieve a 11.2-GHz bandwidth with 53-dB Omega transimpedance gain. The gain-controllable amplifier uses a current-dividing gain-control and emitter peaking circuit and has 11.4-GHz bandwidth with 20-dB variable gain.<<ETX>>

An 80 ps ECL circuit with high current density transistor

Optimization of device parameters of a high speed bipolar transistor has been made to realize an extremely high speed ECL circuit. Using the transistor, an ECL circuit with a gate delay time of 80 ps has been obtained, where the current density is 0.35 mA/µm2. The transistor is of a polysilicon-self-aligned, 1.25 µm lithography technology and shallow emitter and base junctions, prepared in a one micron thin epi-layer. The cut-off frequency of the transistor is 9 GHz. Gate delay time vs. current density dependences for several couples of emitter dimensions, base and collector carrier concentration variations were studied to find out the optimal device parameters. It has been shown that the collector carrier concentration is the most critical in reducing.

Fully large-scale integration-process-compatible Si field emitter technology with high controllability of emitter height and sharpness

We developed a fully large-scale integration (LSI)-process-compatible technology with excellent control of emitter shape for the first time. The fabricated emitter tip configuration has two-step-cone shape whose upper and lower cone configurations are controllable independently. While the upper parts determine the emitter tip sharpness and the apex angle, the lower parts determine the emitter height by utilizing two-step thermal oxidation for emitter tip sharpening in addition to anisotropic reactive ion etching for the emitter height control. The stable and uniform thermal oxidation for sharpening emitters produces excellent uniformity, and the process, without liftoff, is matched with Si LSI technology completely. The obtained 1944 tip emitter with 800 nm gate diameter showed low threshold voltage of 35 V.