Ho-Hsiang Chen
TSMC
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Publication
Featured researches published by Ho-Hsiang Chen.
european solid-state circuits conference | 2010
David Murphy; Qun Jane Gu; Yi-Cheng Wu; Heng-Yu Jian; Zhiwei Xu; Adrian Tang; Frank Wang; Yu-Ling Lin; Ho-Hsiang Chen; Chewn-Pu Jou; Mau-Chung Frank Chang
A low phase noise, wideband, mm-wave, integer-N PLL that is capable of supporting a 802.15.3c heterodyne TRX is reported. The PLL can generate 6 equally spaced tones from 43.2GHz to 51.84GHz, which is suitable for a heterodyne architecture with LO=(4/5)RF. Phase noise is measured directly at the LO frequency and is better than −97.5dBc/Hz@1MHz across the entire band. The total power consumption is 72mW from a 1V supply. The reported frequency synthesizer is smaller, exhibits less phase noise, and consumes less power than prior art. In addition, the LO tone corresponds to the fundamental of the VCO as opposed to a higher harmonic. Central to the PLL performance is the design of a low-noise, mm-wave VCO with a 22.9% tuning range. It is noted that resonator nonlinearities may result in significant up-conversion of flicker noise in wideband, mm-wave VCOs. To overcome this, Digitally-Controlled-Artificial-Dielectric (DiCAD) is used to linearize the resonator.
advanced semiconductor manufacturing conference | 2012
Hsiao-Tsung Yen; Yu-Ling Lin; Clark Hu; S. B. Jan; Chi-Chun Hsieh; Min-Hui Chen; Chin-Wei Kuo; Ho-Hsiang Chen; Min-Chie Jeng
TSV (Thru-Silicon-Via) for 3D packaging technique is a further passive component, for connecting two dies by stacking. RF characteristics of TSV with modeling up to 50GHz are presented in this paper, where a L-2L de-embedding method (double delay) is in use, which is the first applied for TSV on-wafer measurement. Furthermore, a new T-model is proposed for modeling a single TSV of 28nm CMOS process.
international conference on microelectronic test structures | 2012
Yu-Ling Lin; Hsiao-Tsung Yen; Ho-Hsiang Chen; Chewn-Pu Jou; Chin-Wei Kuo; Min-Che Jeng; Fu-Lung Hsuch; Chih-Hua Hsiao; Guo-Wei Huang
On-wafer de-embedding method has been proposed for different method up to millimeter-wave (mm-wave) frequency range. An extended de-embedding method for on wafer devices up to 65 GHz is proposed. Using Vertical connection of L-2L (VL2L) is presented in this paper, with a calibrated loss tangent value in mm-wave. It shows significant good and accurate results for on-wafer modeling up to 65 GHz. VL2L are considered to be a good method for different kind of devices, such as capacitors. Also, the results by different CMOS process and EM simulation are with good agreement.
Archive | 2008
Chewn-Pu Jou; Ho-Hsiang Chen
Archive | 2011
Yu-Ling Lin; Hsiao-Tsung Yen; Ho-Hsiang Chen; Chewn-Pu Jou
Archive | 2010
Hsiao-Tsung Yen; Yu-Ling Lin; Ying-Ta Lu; Chin-Wei Kuo; Ho-Hsiang Chen
Archive | 2012
Hsieh-Hung Hsieh; Po-Yi Wu; Ho-Hsiang Chen; Chewn-Pu Jou; Fu-Lung Hsueh
Archive | 2013
Yu-Ling Lin; Hsiao-Tsung Yen; Feng Wei Kuo; Ho-Hsiang Chen; Chin-Wei Kuo
Archive | 2013
Hsiao-Tsung Yen; Yu-Ling Lin; Cheng Hung Lee; Chin-Wei Kuo; Ho-Hsiang Chen; Min-Chie Jeng
Archive | 2012
Hsiao-Tsung Yen; Yu-Ling Lin; Chin-Wei Kuo; Ho-Hsiang Chen; Min-Chie Jeng