Huimin He

Flexible ZnO nanogenerator for mechanical energy harvesting

In this work, we study and simulate the piezoelectric effect of Zinc Oxide (ZnO) nanowire (NW). We have fabricated a flexible ZnO Nanogenerator (NG) based on the piezoelectric effect of ZnO nanowires. The ZnO nanowires were prepared by a simple solvothermal method. Zinc acetate and NaOH were used as the precursors and ethanol as the solvent. A novel method was developed for producing ZnO nanofilms (NFs) based on solvothermal ZnO NW formation. In ZnO NF, nanowires are stacked laterally and densely. Based on ZnO NF stacking, we fabricated a novel flexible ZnO nanogenerator with a PI-NF-PI sandwich structure. Ag is deposited on the polyimide (PI) substrate, which are electrodes for the of ZnO nanogenerator. ZnO NF is placed between the two PI substrates, thus forming a PI-NF-PI sandwich structure. The entire nanogenerator can be bent freely. The flexible nanogenerator is robust and can be used in many environments. The open-circuit output voltage and short-circuit current of a ZnO nanogenerator were measures to be 0.166 V and 10 nA, respectively.

Parasitic parameter extraction and modeling of via of high speed differential pair

Since high speed digital signal interconnection usually consists of differential transmission lines and pairs of via, signals passing through pairs of via need carefully handling for via can be either capacitive or inductive. The modeling of high speed via is critical to match the impedance of a pair of via and differential transmission line. Parasitic parameters of a pair of via such as capacitances and inductances can be extracted by Q3d, a high performance EM parameter extraction software. Several variables are analyzed: the diameter of via, pad, anti-pad, space between the pair of via and position of ground via around the differential signal via. From the simulation results, parasitic parameters have a significant change with these variables changed. At the same time, TDR (Time domain reflection) and S parameter are also simulated by HFSS to verify the parasitic parameters effects. Parameter extraction and modeling with a pair of via is a helpful way for via optimization, which is commonly used in high speed digital signal interconnection, high frequency transceiver and many application areas.

Analysis on electromagnetic isolation issues among multi-chips in system in package

Electromagnetic isolation is a critical issue to the performance of radio frequency system in package (RF SIP). This paper proposes a novel structure to measure the electromagnetic (EM) isolation property and to test the shield efficiency of a metal cap. The 3-dimensional structure contains 5 antenna chips assembled is based on rigid and flexible substrates. EM interference and EM isolation relevance with different distances is revealed with ideal antenna simulation results in order to eliminate the parasitic effects. EM isolation properties in different horizontal distances are measured between different chips. Moreover, EM isolation properties in different vertical distances are measured using a structure like a pulley block. This paper also demonstrates EM isolation properties of a shield structure with a metal cap. The test results show the shield efficiency of a metal cap reaches more than 50dB. These results are constituent with the simulation results simulated by HFSS, a 3-dimensional electromagnetic field simulation software.

Design and Implementation of a High-Coupling and Multichannel Optical Transceiver With a Novel Packaging Structure

Short-reach optical interconnection mainly focuses on the power consumption, the cost, and the volume. According to these requirements, the design and implementation of a multichannel transceiver are presented in this paper. In this paper, a high-coupling method without the 90° beam deflection is proposed so as to reduce the total power consumption to 0.9 W. Moreover, only the mature and low-cost packaging methods such as wire bonding and flip chip are adopted to satisfy the requirement of the optical coupling, which reduces the cost. Finally, the designed transceiver retains a small size of

Research on Optical Transmitter and Receiver Module Used for High-Speed Interconnection between CPU and Memory

28\times 16 \,\, \times

Substrate design of a 3-D microwave front-end multi-chip module with antennas integrated

3 mm3. To ensure normal function of the transceiver, the organic substrate is carefully designed, and the post-design simulation is conducted to characterize the electrical performance. At last, the test results show that the optical transceiver with this novel packaging structure is able to transmit the data at 10 Gb/s per channel successfully.

Signal Integrity Design For QSFP interface applicated in RF Optical transmitter Module

ABSTRACT With the development of the multicore processor, the bandwidth and capacity of the memory, rather than the memory area, are the key factors in server performance. At present, however, the new architectures, such as fully buffered DIMM (FBDIMM), hybrid memory cube (HMC), and high bandwidth memory (HBM), cannot be commercially applied in the server. Therefore, a new architecture for the server is proposed. CPU and memory are separated onto different boards, and optical interconnection is used for the communication between them. Each optical module corresponds to each dual inline memory module (DIMM) with 64 channels. Compared to the previous technology, not only can the architecture realize high-capacity and wide-bandwidth memory, it also can reduce power consumption and cost, and be compatible with the existing dynamic random access memory (DRAM). In this article, the proposed module with system-in-package (SiP) integration is demonstrated. In the optical module, the silicon photonic chip is included, which is a promising technology to be applied in the next-generation data exchanging centers. And due to the bandwidth–distance performance of the optical interconnection, SerDes chips are introduced to convert the 64-bit data at 800 Mbps from/to 4-channel data at 12.8 Gbps after/before they are transmitted though optical fiber. All the devices are packaged on cheap organic substrates. To ensure the performance of the whole system, several optimization efforts have been performed on the two modules. High-speed interconnection traces have been designed and simulated with electromagnetic simulation software. Steady-state thermal characteristics of the transceiver module have been evaluated by ANSYS APLD based on finite-element methodology (FEM). Heat sinks are placed at the hotspot area to ensure the reliability of all working chips. Finally, this transceiver system based on silicon photonics is measured, and the eye diagrams of data and clock signals are verified.

Electrical Research of Silicon Substrate Packaging Technology Based on the Cavity

This paper demonstrates the substrate design considerations of a 3-dimensional (3-D) microwave (MW) multi-chip module (MCM). This module is a dual-band microwave front-end working at Ka-band (Transmit) and K-band (Receive). Three organic substrates are stacked up via ball grid array (BGA), combining a transceiver module with both frequency band antennas integrated. Substrate design needs considerations of multiple aspects. As for active chips, selection and placement of MMICs, bond wire design, Electromagnetic (EM) isolation and thermal management of high power MMICs are of great importance. As for passive components patterned on the substrates, band pass filter, DC-AC block and antennas are main devices need to be simulated and optimized.