Hwan-k Seo

Lifetime of EUVL masks as a function of degree of carbon contamination and capping materials

Lifetime of EUVL masks which are intentionally contaminated with carbon is investigated by comparing Si and Ru capping layer. Carbon deposition is observed not only on the multilayer, but also on the absorber sidewall of the mask. Deposited carbon on the sidewall during EUV exposure gradually varies mask CD and also induces the changes in the wafer printability and dose in the scanner. In addition, we compare the effects of carbon contamination between Si and Ru capped blank. Ru capped blank shows longer mask mean time between cleaning (MTBC) than Si capped blank by 25% in our experiments.

Properties of EUVL masks as a function of capping layer and absorber stack structures

We have fabricated extreme ultraviolet lithography (EUVL) blank masks consisting of a TaN absorber, Ru capping layer, and Mo/Si multilayers using ion-beam sputter deposition and investigated their dependence on capping layer and absorber stack structure. At EUV wavelengths, the reflectivities of the multilayers, including their dependency on the thickness of the capping and absorber layers, are in good agreement with simulation results obtained using Maxwell equations and the refractive indexes of each layer. Ru, one of the most promising capping materials on Mo/Si multilayers due to its resistance to oxidation and selectivity to etching, also shows better EUV reflectivity than Si as a capping layer if we choose a thickness that produces a constructive interference. To meet the reflectivity requirements (⩽ 0.5 %) in the SEMI EUVL mask standard specifications, a TaN absorber at least 70 nm thick should be applied. However, aerial image results simulated by using EM-Suite show that 40 nm is sufficient for the TaN absorber to display the maximum image contrast. In addition, horizontal-vertical (HV) biasing effects due to mask shadowing become negligible if the TaN is reduced to about 40 nm. As a result, we suggest using a thin TaN absorber 40 nm thick since it is able to minimize mask shadowing effects without a loss of image contrast.

Absorber stack optimization in EUVL masks: lithographic performances in alpha demo tool and other issues

Thinner absorber structure in EUVL mask is supposed to be applied in 2x HP node since it shows several advantages including H-V bias reduction. Here, lithographic performances of EUVL masks as a function of absorber stack height are investigated using ADT exposure experiments. Wafer SEM images show that minimum resolution is almost identical at ~27.5 nm with absorber thickness ranging from 45 to 70 nm. Simulations also exhibit that NILS and contrast become maximized and saturated in those ranges. However, thinner absorber structure using 50-nm-thick absorber shows much lower H-V bias than conventional structure using 70-nm-thick absorber. MEEF, EL, DOF, and LWR are also slightly improved with thinner absorber. One of the noticeable issues in thin absorber is low OD which results in pattern damages and CD reduction at shot edges due to light leakage from the neighboring exposures. To overcome these issues, appropriate light shielding process during mask fabrication as well as minimizing OoB radiation in EUVL scanner are required. Another item to prepare for 2x HP node is to increase defect detection sensitivity with 19x nm inspection tools. Thus, absorber stacks with new ARC layer optimized for 19x nm inspection should be developed and applied in EUVL mask blanks.

Effects of mask absorber structures on the extreme ultraviolet lithography

In this paper, the authors present the results of an investigation of the dependence of mask absorber thickness on the extreme ultraviolet lithography (EUVL) and suggest a new mask structure to minimize shadowing effects. For this purpose, several patterned masks with various TaN absorber thicknesses are fabricated using in-house Ru-capped EUVL mask blanks. According to the simulation using practical refractive indices, which are obtained at EUV wavelengths, the absorber thickness can be reduced to that of out-of-phase (ΔΦ=180°) ranges without loss of image contrast and normalized image log slope. Thickness to meet out-of-phase in real mask can be obtained by comparing field spectrum intensity ratio using the EUV coherent scattering microscopy (CSM). 52.4nm in thickness is close to ΔΦ=180° for TaN absorber since it shows the highest 1st/0th order intensity ratio as well as the best resolution in the microfield exposure tool (MET) test. When we apply 40-nm-thick TaN instead of 80-nm-thick TaN, the amounts of H-V bias reduction in wafer scale correspond to 80% (2.46–0.48nm) by CSM and 70% (2.23–0.65nm) by MET test results. Considering the fact that H-V bias in the MET is similar with that of simulation using the resist model, the degree of H-V bias in the alpha demo tool (ADT) is supposed to be much higher than that of MET due to its higher incident angle (θ=6°). Our final goal is to develop a thin absorber EUVL mask which has a low H-V bias, high EUV printability and DUV contrast, and sufficient optical density at the border. To achieve this, blind layer treatment and integration with anti-reflective coating layer are in progress.In this paper, the authors present the results of an investigation of the dependence of mask absorber thickness on the extreme ultraviolet lithography (EUVL) and suggest a new mask structure to minimize shadowing effects. For this purpose, several patterned masks with various TaN absorber thicknesses are fabricated using in-house Ru-capped EUVL mask blanks. According to the simulation using practical refractive indices, which are obtained at EUV wavelengths, the absorber thickness can be reduced to that of out-of-phase (ΔΦ=180°) ranges without loss of image contrast and normalized image log slope. Thickness to meet out-of-phase in real mask can be obtained by comparing field spectrum intensity ratio using the EUV coherent scattering microscopy (CSM). 52.4nm in thickness is close to ΔΦ=180° for TaN absorber since it shows the highest 1st/0th order intensity ratio as well as the best resolution in the microfield exposure tool (MET) test. When we apply 40-nm-thick TaN instead of 80-nm-thick TaN, the amounts ...

Printability and inspectability of programmed pit defects on the masks in EUV lithography

Printability and inspectability of phase defects in EUVL mask originated from substrate pit were investigated. For this purpose, PDMs with programmed pits on substrate were fabricated using different ML sources from several suppliers. Simulations with 32-nm HP L/S show that substrate pits with below ~20 nm in depth would not be printed on the wafer if they could be smoothed by ML process down to ~1 nm in depth on ML surface. Through the investigation of inspectability for programmed pits, minimum pit sizes detected by KLA6xx, AIT, and M7360 depend on ML smoothing performance. Furthermore, printability results for pit defects also correlate with smoothed pit sizes. AIT results for patterned mask with 32-nm HP L/S represents that minimum printable size of pits could be ~28.3 nm of SEVD. In addition, printability of pits became more printable as defocus moves to (-) directions. Consequently, printability of phase defects strongly depends on their locations with respect to those of absorber patterns. This indicates that defect compensation by pattern shift could be a key technique to realize zero printable phase defects in EUVL masks.

Analysis of process margin in EUV mask repair with nano-machining

Reduced design rules demand higher sensitivity of inspection, and thus small defects which did not affect printability before require repair now. The trend is expected to be similar in extreme ultraviolet lithography (EUVL) which is a promising candidate for sub 32 nm node devices due to high printing resolution. The appropriate repair tool for the small defects is a nanomachining system. An area which remains to be studied is the nano-machining system performance regarding repair of the defects without causing multilayer damage. Currently, nanomachining Z-depth controllability is 3 nm while the Ru-capping layer is 2.5 nm thick in a Buffer-less Ru-capped EUV mask. For this report, new repair processes are studied in conjunction with the machining behavior of the different EUVL mask layers. Repair applications to achieve the Edge Placement(EP) and Z-depth controllability for an optimal printability process window are discussed. Repair feasibility was determined using a EUV micro exposure tool (MET) and Actinic Imaging Tool (AIT) to evaluate repairs the 30 nm and 40 nm nodes. Finally, we will report the process margin of the repair through Slitho-EUVTM simulation by controlling side wall angle, Z-depth, and EP (Edge Placement) on the base of 3-dimensional experimental result.

Characteristics and issues of an EUVL mask applying phase-shifting thinner absorber for device fabrication

Phase-shifting EUVL masks applying thinner absorber are investigated to design optimum mask structure with less shadowing problems. Simulations using S-Litho show that H-V bias in Si capping structure is higher than that of Ru capping since the high n (= 0.999) of Si increases sensible absorber height. Phase differences obtained from the patterned masks using the EUV CSM are well-matched with the calculated values using the practical refractive index of absorber materials. Although the mask with 62.4-nm-thick absorber, among the in-house masks, shows the closest phase ΔΦ(= 176°) to the out-of-phase condition, higher NILS and contrast as well as lower H-V bias are obtained with 52.4-nm-thick absorber (ΔΦ = 151°) which has higher R/R0 ratio. MET results also show that lithography performances including MEEF, PW, and resist threshold (dose), are improved with thinner absorber structure. However, low OD in EUVL mask, especially in thinner absorber structure, results in light leakage from the neighboring exposure shots, and thus an appropriate light-shielding layer should be introduced.

Effects of multilayer period on EUVL imaging for 2X node and beyond

In EUVL, major impacts on determining critical dimension (CD) are resist process, scanner finger print, and mask characteristics. Especially, reflective optics and its oblique incidence of light bring a number of restrictions in mask aspect. In this paper, we will present one of the main contributors for wafer CD performance, such as center wavelength (CW) of multilayer (ML) in EUVL mask. We evaluate wafer CDs in 27.5nmHP L/S, 30nmHP L/S, and 30nmHP contact patterns with NXE3100 by using masks with purposely off-targeted CW ranging from 13.4 to 13.7nm. Based on the results from the exposure experiments, we verify that the CW specification for NXE3100 is regarded as 13.53 ± 0.015nm at CWU=0.03nm to satisfy the wafer CD requirements. According to verified simulations, however, we suggest a new CW specification for NXE3300 with higher values considering wide illumination cone angle from larger numerical aperture (0.33NA). Moreover, simulations in different exposure conditions of NXE3300 with various patterns below 20nm node show that customized CW specification might be required depending on target layers and illumination conditions. We note that it is also important to adjust CW and CWU in final mask product considering realistic difficulties of fabrcation, resulting in universal CW specification.

Durability of Ru-based EUV masks and the improvement

In EUV Lithography, an absence of promising candidate of EUV pellicle demands new requirements of EUV mask cleaning which satisfy the cleaning durability and removal efficiency of the various contaminations from accumulated EUV exposure. It is known that the cleaning with UV radiation is effective method of variety of contaminants from surface, while it reduces durability of Ru capping layer. To meet the expectation of EUV mask lifetime, it is essential to understand the mechanism of Ru damage. In this paper, we investigate dominant source of Ru damage using cleaning method with UV radiation. Based on the mechanism, we investigate several candidates of capping to increase the tolerance from the cycled UV cleaning. In addition, we study durability difference depending on the deposition method of Ru capping. From these studies, it enables to suggest proper capping material, stack and cleaning process.

Printability and inspectability of defects on EUV blank for 2xnm hp HVM application

The availability of defect-free masks remains one of the key challenges for inserting extreme ultraviolet lithography (EUVL) into high volume manufacturing. Recently both blank suppliers achieved 1-digit number of defects at 60nm in size using their M1350s. In this paper, a full field EUV mask with Teron 61X blank inspection is fabricated to see the printability of various defects on the blank using NXE 3100. Minimum printable blank defect size is 23nm in SEVD using real blank defect. Current defect level on blank with Teron 61X Phasur has been up to 70 in 132 X 132mm2. More defect reduction as well as advanced blank inspection tools to capture all printable defects should be prepared for HVM. 3.6X reduction of blank defects per year is required to achieve the requirement of HVM in the application of memory device with EUVL. Furthermore, blank defect mitigation and compensational repair techniques during mask process needs to be developed to achieve printable defect free on the wafer.