J.M. de la Rosa

High-level synthesis of switched-capacitor, switched-current and continuous-time /spl Sigma//spl Delta/ modulators using SIMULINK-based time-domain behavioral models

This paper presents a high-level synthesis tool for /spl Sigma//spl Delta/ modulators (/spl Sigma//spl Delta/Ms) that combines an accurate SIMULINK-based time-domain behavioral simulator with a statistical optimization core. Three different circuit techniques for the modulator implementation are considered: switched-capacitor, switched-current and continuous-time. The behavioral models of these circuits, that take into account the most critical limiting factors, have been incorporated into the SIMULINK environment by using S-function blocks, which drastically increase the computational efficiency. The precision of these models has been validated by electrical simulations using HSPICE and experimental measurements from several silicon prototypes. The combination of high accuracy, short CPU time and interoperability of different circuit models together with the efficiency of the optimization engine makes the proposed tool an advantageous alternative for /spl Sigma//spl Delta/M synthesis. The implementation on the well-known MATLAB/SIMULINK platform brings numerous advantages in terms of data manipulation, processing capabilities, flexibility and simulation with other electronic subsystems. Moreover, this is the first tool dealing with the synthesis of /spl Sigma//spl Delta/Ms using both discrete-time and continuous-time circuit techniques.

A CMOS 110-dB@40-kS/s programmable-gain chopper-stabilized third-order 2-1 cascade sigma-delta Modulator for low-power high-linearity automotive sensor ASICs

This paper describes a 0.35-/spl mu/m CMOS chopper-stabilized switched-capacitor 2-1 cascade /spl Sigma//spl Delta/ modulator for automotive sensor interfaces. The modulator architecture has been selected from an exhaustive comparison among multiple topologies in terms of resolution, speed and power dissipation. To obtain a better fitting with the characteristics of different sensor outputs, the circuit can be digitally programmed to yield four input-to-output gain values (/spl times/0.5,/spl times/1,/spl times/2, and /spl times/4) and has been designed to operate within the stringent environmental conditions of automotive electronics (temperature range of -40/spl deg/C to 175/spl deg/C). In order to relax the amplifiers dynamic requirements for the different modulator input-to-output gains, switchable capacitor arrays are used for all the capacitors in the first integrator. The design of the building blocks is based on a top-down CAD methodology which combines simulation and statistical optimization at different levels of the modulator hierarchy. The circuit is clocked at 5.12 MHz and the overall power consumption is 14.7 mW from a single 3.3-V supply and occupies 5.7 mm/sup 2/ silicon area. Experimental results show a maximum SNR of 87.3 dB within a 20-kHz signal bandwidth and 90.7 dB for 10-kHz signals, and an overall DR of 110 and 113.8dB, respectively. These performance features place the reported circuit at the cutting edge of state-of-the-art high-resolution /spl Sigma//spl Delta/ modulators.

Analysis of clock jitter error in multibit continuous-time /spl Sigma//spl Delta/ modulators with NRZ feedback waveform

This paper presents a detailed study of the clock jitter error in multibit continuous-time /spl Sigma//spl Delta/ modulators with non-return-to-zero feedback waveform. Closed-form expressions are derived for the in-band error power and the signal-to-noise ratio showing that the jitter-induced noise can be separated into two main components: one depending on the modulator loop filter and the other one due to the input signal. The latter, not considered in previous approaches, allows us to accurately predict the signal-to-noise ratio degradation and to optimize the modulator performance in terms of jitter insensitivity. Moreover, the use of state-space formulation makes the analysis quite general and applicable to either cascaded or single-loop architectures. Time-domain simulations of several modulators are shown to validate the presented approach.

MATLAB/SIMULINK-based high-level synthesis of discrete-time and continuous-time /spl Sigma//spl Delta/ modulators

This paper describes a tool that combines an accurate SIMULINK-based time-domain behavioural simulator with a statistical optimizer for the automated high-level synthesis of /spl Sigma//spl Delta/ modulators (/spl Sigma//spl Delta/Ms). The combination of high accuracy, short CPU time and interoperability of different circuit models together with the efficiency of the optimization engine makes the proposed tool an advantageous alternative for /spl Sigma//spl Delta/M synthesis. The implementation on the well-known MATLAB/SIMULINK platform brings numerous advantages in terms of data manipulation, flexibility and simulation with other electronic subsystems. Moreover, this is the first tool dealing with the synthesis of /spl Sigma//spl Delta/Ms using both discrete-time (DT) and continuous-time (CT) circuit techniques.

CMOS Cascade Sigma-Delta Modulators for Sensors and Telecom

List of Abbreviations. Preface. CHAPTER 1 - SD ADCs: Principles, Architectures, and State of the Art. 1.1. Analog-to-Digital Conversion: Fundamentals. 1.2. Oversampling SD ADCs: Fundamentals. 1.3. Single-Loop SD Architectures. 1.4. Cascade SD Architectures. 1.5. Multi-Bit SD Architectures. 1.6. Parallel SD Architectures. 1.7. State of the Art in SD ADCs. 1.8. Summary. CHAPTER 2 - Non-Ideal Performance of SD Modulators. 2.1. Integrator Leakage. 2.1.1. Single-loop SD modulators. 2.1.2. Cascade SD modulators. 2.2. Capacitor Mismatch. 2.3. Integrator Settling Error. 2.4. Circuit Noise. 2.5. Clock Jitter. 2.6. Sources of Distortion. 2.7. Summary. CHAPTER 3 - A Wideband SD Modulator in 3.3-V 0.35-um CMOS. 3.1. Design Methodology. 3.2. Topology Selection. 3.3. Switched-Capacitor Implementation. 3.4. Specifications for the Building Blocks. 3.5. Design of the Building Blocks. 3.6. Layout and Prototyping. 3.7. Experimental Results. 3.8. Performance Summary. 3.9. Performance Comparison with the State of the Art. 3.10. Summary. CHAPTER 4 - A SD Modulator in 2.5-V 0.25-um CMOS for ADSL/ADSL+. 4.1. Topology Selection. 4.2. Switched-Capacitor Implementation. 4.3. Specifications for the Building Blocks. 4.4. Design of the Building Blocks. 4.5. Layout and Prototyping. 4.6. Experimental Results. 4.7. Performance Summary. 4.8. Performance Comparison with the State of the Art. 4.9. Summary. CHAPTER 5 - A SD Modulator with Programmable Signal Gain for Automotive Sensor Interfaces. 5.1. Basic Design Considerations. 5.2. Architecture Selection and High-Level Sizing. 5.3. Design of the Building Blocks. 5.4. Layout and Prototyping. 5.5. Experimental Results. 5.6. Summary. APPENDIX A - An Expandible Family of Cascade SD Modulators. A.1. Topology Description. A.2. Non-Ideal Performance. APPENDIX B - Power Estimator for Cascade SD Modulators. B.1. Dominant Error Mechanisms. B.2. Estimation of Power Consumption. References.

An optimization-based tool for the high-level synthesis of discrete-time and continuous-time /spl Sigma//spl Delta/ modulators in the Matlab/Simulink environment

This work presents a Matlab toolbox for the automated high-level sizing of /spl Sigma//spl Delta/ modulators (/spl Sigma//spl Delta/M) based on the combination of an accurate time-domain behavioural simulator and a statistical optimizer. The implementation on the well-known Matlab/Simulink platform brings numerous advantages in terms of data manipulation, flexibility and simulation with other electronic systems. Moreover, this is the first tool dealing with the synthesis of /spl Sigma//spl Delta/M using both discrete-time (DT) and continuous-time (CT) circuit techniques.

A direct synthesis method of cascaded continuous-time sigma-delta modulators

This paper presents an efficient method to synthesize cascaded sigma-delta modulators implemented with continuous-time circuits. It is based on the direct synthesis of the whole cascaded architecture in the continuous-time domain instead of using a discrete-to-continuous time transformation as has been done in previous approaches. In addition to place the zeros of the loop filter in an optimum way, the proposed methodology leads to more efficient architectures in terms of circuit complexity, power consumption and robustness with respect to circuit nonidealities.

A SIMULINK-based approach for fast and precise simulation of switched-capacitor, switched-current and continuous-time /spl Sigma//spl Delta/ modulators

This paper describes how to extend the capabilities of SIMULINK for the time-domain simulation of /spl Sigma//spl Delta/ modulators implemented by using switched-capacitor, switched-current and continuous-time circuits, considering the most important error mechanisms. The behavioural models of these circuits are incorporated into the SIMULINK environment by using C-language S-function blocks, which leads to a drastic saving in the simulation time as compared to previous approaches based on MATLAB functions. The outcome is a complete SIMULINK block library that allows interactive, fast and accurate simulation of an arbitrary /spl Sigma//spl Delta/ topology.

Bromine enrichment in marsh sediments as a marker of environmental changes driven by Grand Solar Minima and anthropogenic activity (Caminha, NW of Portugal)

A sediment core collected in Caminha tidal marsh, NW Portugal, was used to assess bromine (Br) signal over the last ca. 1,700 years. The Br temporal variability reflects its close relationship with soil/sediment organic matter (OM) and also alterations in Br biogeochemical recycling in marsh environment. The highest Br enrichment in sediments was found during the Maunder Solar Minimum, a major solar event characterized by lower irradiance (TSI) and temperature, increased cloudiness and albedo. The obtained results suggest that those climate-induced changes weakened the natural mechanisms that promote Br biochemical transformations, driven by both living plants metabolism and plant litter degradation, with the ensuing generation of volatile methyl bromide (CH3Br). It seems that the prevailing climate conditions during the Maunder favoured the retention of more Br in marsh ecosystem, ultimately decreasing the biogenic Br emissions to the atmosphere. During the 20th century, the Br pattern in sediments appears to mirror likewise anthropogenic sources. The significant correlation (p<0.05) between Br/OM ratios and Pb contents in sediments after 1934 suggests a common source. This is most probably related with the rise, massive consumption and prohibition of leaded gasoline, where ethylene dibromide was added as lead scavenger to antiknock mixtures. More regionally, the concerted use of flame retardants on forest fire management, covering the 1980s through mid-1990s in the north of Portugal and Galicia, could be responsible for the observed increase of sediment Br (relatively to Pb) pool of this tidal marsh. Although man-made brominated compounds are being phased-out since the inception of the 1992 Montreal Protocol, the Caminha tidal marsh sedimentary record showed that Br levels only started to decline after 2002.

Pyrolysis-gas chromatography-isotope ratio mass spectrometry of polyethylene

Polyethylene is probably the most used plastic material in daily life and its accurate analysis is of importance. In this communication the chemical structure of polyethylenes is studied in detail using conventional analytical pyrolysis (Py-GC/MS), bulk stable isotopic analysis (IRMS) and pyrolysis compound specific stable isotopic analysis (Py-CSIA) to measure stable isotope proportions (δ(13)C, δ(15)N and δD) of polyethylene pyrolysis compounds. Polyethylene pyrolysis yields triplet peaks of n-alkanes, α-alkenes and α,ω-alkanedienes. No differences were found for bulk δ(13)C among different polyethylene types. However, conspicuous differences in δD were evident. It was possible to assign structure δ(13)C and δD values to specific polyethylene pyrolysis products in the range 12-18 carbon chain length. Conspicuous differences were found for the pyrolysis products with unsaturated moieties showing significant higher δD values than saturated chains (alkanes) that were deuterium depleted. In addition, a full isotopic fingerprinting (δ(13)C, δ(15)N and δD) for a dye (o-chloroaniline) contained in a polyethylene is reported. To the best of our knowledge this is the first application Py-CSIA to the study of a synthetic polymer. This hyphenated analytical technique is a promising tool to study synthetic materials, providing not only a fingerprinting, but also allowing the traceability of the polymerization process and the origin of the materials.