J. Priesol

Enhanced Photoluminescence from InGaN/GaN Quantum Wells on A GaN/Si(111) Template with Extended Three-Dimensional GaN Growth on Low-Temperature AlN Interlayer

This paper describes a low-cost route for the reduction of dislocations during growth of GaN on Si(111) using metalorganic vapour phase epitaxy (MOVPE) through three-dimensional (3D) island growth on a low temperature AlN layer which introduces a compressive stress into the over-lying GaN layer to compensate for the thermal mismatch stress between the nitride layer and Si(111) substrate. Such a 3D growth process leads to the reduction of grain twist as the result of the reduction in the number of dislocations having a component parallel to the basal plane. The dislocation reduction process leads to a more uniform luminescence from InGaN/GaN quantum wells, as revealed by spectrally-resolved cathodoluminescence imaging of the cross-section of samples.

Post-deposition annealing and thermal stability of integrated self-aligned E/D-mode n ++ GaN/InAlN/AlN/GaN MOS HEMTs

We describe technology and evaluate thermal performance of enhancement/depletion (E/D)-mode n++GaN/InAlN/AlN/GaN HEMTs with a self-aligned metal-oxide-semiconductor (MOS) gate processing, where n++GaN layer was etched away only under the gate for E-mode and for D-mode stay intact. Gate contacts were isolated using a dielectric layer deposited at low temperature through an e-beam resist to retain the self-aligned approach. Threshold voltage of the as deposited E- and D-mode HEMTs was +0.6 V and -2.4 V, respectively. After post-deposition annealing (PDA) at 300 °C in N2 atmosphere the threshold voltage has been changed to +3 V and - 4,4 V for E- and D-mode HEMTs, respectively. These effects were explained by decreasing density of deep interface states in the D-mode HEMTs and decreasing surface donors at the semiconductor-oxide interface in case of the E-mode HEMTs. After PDA, electrical performance of both types of transistors was evaluated from room temperature to 150 °C. At elevated temperatures, injection and trapping of electrons from the gate metal to the oxide was found in D-mode HEMTs, while emission of electrons from the oxide-semiconductor interface states was crucial for the E-mode ones.

Influence of structure geometry and bulk traps on switching transients of InAlN/GaN HEMT

Impact of structure geometry and bulk traps on the performance of the n++GaN/InAlN/AlN/GaN high electron mobility transistor (HEMT) using two-dimensional Sentaurus TCAD simulation tool were investigated. Simulations were performed by the electrophysical models calibrated on real devices. The results indicate a significant influence of both acceptor and donor traps on device switching characteristics.

Dataset for 'Design and fabrication of enhanced lateral growth for dislocation reduction and strain management in GaN using nanodashes'

This dataset contains the results of scanning electron microscopy (SEM) secondary electron (SE) images, panchromatic cathodoluminescence (CL) imaging and Electron Channelling Contrast Imaging (ECCI) and Raman spectroscopy on GaN epitaxial layers. These techniques were used to assess the morphology of the GaN crystal growth, and the dislocation density and strain in planar layers.

Time resolved EBIC study of InAlN/GaN HFETs

Transient phenomena in depletion-mode Gallium Nitride (GaN) Heterostructure Field-Effect Transistor (HFET) structures biased to various operation points corresponding to their real applications has been studied using Time-Resolved Electron Beam Induced Current (TREBIC) method. It has been found, that the amplitude and shape of the transient response depends on the gate voltage VGs and position of the electron beam in the active region of the HFET. Inhomogeneous lateral build-up and recovery of electric field has been observed at the gate in the drain access region of the HFETs, attributed to inhomogeneous distribution of the trapping centres in proximity of the Schottky gate electrode.

Investigation of defects in GaN HFET structures by electroluminescence

This contribution deals with the detection and analysis of electroluminescence emitted by depletion mode (normally-on) InAlN/GaN heterostructure field effect transistors (HFETs) at room temperature and drain-source voltages ranging from 20 to 30 V. Collected electroluminescence maps are used to reveal and localize strong electrically stressed and critical regions of GaN HFETs influencing their functionality and reliability. Such defective regions have been observed along gate fingers as well as at the edges of the drain contact pad expanded outside the transistor structure itself. Identification of observed HFET imperfections provides a valuable feedback towards the optimization of HFETs technology with positive impact on the quality and overall electronic performance of such advanced electronic devices.

SEM techniques for characterization of GaN nanostructures and devices

The scanning electron microscope (SEM) techniques play a key role in the characterization of various inorganic and/or organic semiconducting materials, micro-/nanostructures and devices. The power of the SEM methods is mainly in imaging, characterization and diagnostics of local near surface properties. Among a variety of the SEM methods, Cathodoluminescence (CL) and Electron Beam Induced Current (EBIC) methods have been extensively used for characterization of generation/recombination phenomena and electrical properties of bulk semiconductors and semiconductor structures [1]. Exploitation of these methods allow to visualize the electrically active defects such as dislocations, grain boundaries and inhomogeneities and to estimate the diffusion length, lifetime and surface recombination velocity of minority carriers. In addition, EBIC can be used for investigation and diagnostics of SCR of Schottky and p-n junctions, which extends its applications, in combination with other techniques such as Voltage Contrast (VC), to functional diagnostics of electronic devices biased at operation point. Currently, various modifications and improvements of “standard” SEM methods are developed to improve their resolution and sensitivity for investigations of advanced structures and devices structural, optical and electrical properties. Various sample preparation and micromanipulation / microprobe techniques are examined to localize appropriate signals with the aim to improve the spatial resolution while for extreme depth resolution low acceleration voltages of SEM techniques are utilized [2]. In addition, complex signal acquisition and processing techniques are implemented to achieve time and frequency resolution and to gain required information about the sample properties.