Jae-Seob Roh

The features and characteristics of 5M CMOS image sensor with 1.9/spl times/1.9/spl mu/m/sup 2/ pixels

5 mega CMOS image sensor with 1.9mum-pitch pixels has been implemented with 0.13 mum low power CMOS process. By applying 4-shared pixel architecture, 2.5V operation voltage, and tight design rules for some critical layers in pixels, high fill factor and the corresponding high saturation could be obtained. Image lag was sufficiently suppressed by pulse-boosting of transfer gate voltage and electrical cross-talk was suppressed by use of n-type epitaxial layer. It is shown that several sophisticated processes improve sensitivity, temporal random noise, and dark current. With this technology, full 5-mega density CMOS image sensor chips have been successfully developed