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Featured researches published by Jayawardan Janardhanan.


international symposium on circuits and systems | 2009

Quantization noise improvement of Time to Digital converter (TDC) for ADPLL

Jawaharlal Tangudu; Sarma S. Gunturi; Saket Jalan; Jayawardan Janardhanan; Raghu Ganesan; Debapriya Sahu; Khurram Waheed; John Wallberg; Robert Bogdan Staszewski

A number of communication applications are moving to digitally motivated architectures for their radio frequency module. This includes GSM-EDGE, WLAN, Bluetooth, GSM-GPRS, WiMAX. The All Digital PLL(ADPLL) forms the core of this architecture. The objective of the ADPLL is to generate a clean carrier frequency ƒc, based on a input reference frequency ƒref. As part of the phase error measurement of the PLL, a Time to Digital converter(TDC) is used to measure the delay between ƒref clock edge and carrier clocking edge. An inverter chain is used to measure this delay as a integer number of basic inverter delay. This measurement error is termed TDC quantization error and effects the phase noise present in the final carrier. Due to the coarse delay of the basic inverter available, TDC introduces large quantization noise at the output of the PLL. This is too high for systems operating at high carrier frequencies or systems which have a tight phase noise requirement. This paper presents techniques to improve TDC quantization noise.


national conference on communications | 2013

Principal architectural changes in polar transmitter in DRP design for WLAN

Sarma S. Gunturi; Jawaharlal Tangudu; Sthanunathan Ramakrishnan; Jayawardan Janardhanan; Debapriya Sahu; Subhashish Mukherjee

In Digital Radio Processor(DRP) an All-digital Phase Locked Loop(ADPLL) forms the core of the architecture with a digitally controlled oscillator(DCO) being the counterpart of Voltage Controlled Oscillator (VCO) in a conventional PLL design. In addition to this, the RF modulation is also performed digitally by feeding Frequency Control Word(FCW) into the ADPLL. This implies that the DCO should be able to support the frequency range requirements for the modulation technique. DCO modulation range for GSM and Bluetooth systems is few hundreds of KHz. However, in order to support WLAN in both 2.4 GHz (ISM band) and 5–5.9 GHz(UNII) bands the DCO needs to have 1.2 GHz modulation range at 12 GHz frequency. Such a DCO becomes extremely sensitive to supply voltage fluctuations. We propose an algorithm which reduces the modulation range requirement of the DCO and hence its sensitivity to supply voltage. In DRP, the modulated clock output of the ADPLL is used as the sampling clock for the digital logic. For GSM and Bluetooth systems the drift introduced in phase samples by using the modulated clock is negligible. However, for WLAN, merely using the modulated clock for sampling is disastrous as it will introduce intolerable drift in the phase samples when compared to phase samples generated by using a constant uniform clock. We propose a predistortion scheme for frequency control words(FCW) to correct this effect of modulated clock.


Archive | 2011

Attitude estimation for pedestrian navigation using low cost mems accelerometer in mobile applications, and processing methods, apparatus and systems

Jayawardan Janardhanan; Goutam Dutta; Varun Tripuraneni


Archive | 2011

Robust step detection using low cost mems accelerometer in mobile applications, and processing methods, apparatus and systems

Jayawardan Janardhanan; Sandeep Rao; Goutam Dutta


Multi-Mode/Multi-Band RF Transceivers for Wireless Communications: Advanced Techniques, Architectures, and Trends | 2011

Precise delay alignment between amplitude and phase/frequency modulation paths in a digital polar transmitter

Khurram Waheed; Jayawardan Janardhanan; Sameh Rezeq; Robert Bogdan Staszewski; Saket Jalan


Archive | 2012

Apparatus and method for indoor positioning

Deric W. Waters; Jayawardan Janardhanan


Archive | 2010

PHASE INTERPOLATOR AND A DELAY CIRCUIT FOR THE PHASE INTERPOLATOR

Anant Shankar Kamath; Krishnaswamy Nagaraj; Sudheer Vemulapalli; Jayawardan Janardhanan; Karthik Subburaj; Sujoy Chakravarty; Vikas Sinha


Archive | 2001

Method to upscale single-pixel wide text without loss of image sharpness

Jayawardan Janardhanan


Archive | 2011

Static Heading Detection in Personal Navigation Device

Tarkesh Pande; Jaiganesh Balakrishnan; Deric W. Waters; Goutam Dutta; Jayawardan Janardhanan; Sthanunathan Ramakrishnan; Sandeep Rao; Karthik Ramasubramanian


Archive | 2013

METHOD, SYSTEM AND APPARATUS FOR VEHICULAR NAVIGATION USING INERTIAL SENSORS

Sachin Bhardwaj; Sriram Murali; Jaiganesh Balakrishnan; Jayawardan Janardhanan; Yogesh Shekar; Goutam Dutta

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