Jeffrey L. Klein

Method for forming inlaid interconnects in a semiconductor device

Method for forming a plug and semiconductor device having the same

Acoustically regulated polishing process

Method of forming layered polysilicon filled contact by doping sensitive endpoint etching

LDD transistor process having doping sensitive endpoint etching

Process for fabricating a semiconductor device having an improved metal interconnect structure

Method for forming a via in a semiconductor device

Method for forming self-aligned vias in multi-level metal integrated circuits

Method for forming a conductive structure having a composite or amorphous barrier layer

Semiconductor device having an improved metal interconnect structure