Jeng-Wei Yang
Microchip Technology
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Publication
Featured researches published by Jeng-Wei Yang.
symposium on vlsi technology | 2004
Dana Lee; Felix Tsui; Jeng-Wei Yang; Feng Gao; Wen-Juei Lu; Yeeheng Lee; Chi-Tsai Chen; V. Huang; Pin-Yao Wang; M.H. Liu; H.C. Hsu; S. Chang; S.Y. Chang; H. Van Tran; Jack Edward Frayer; Yaw-Wen Hu; B. Yeh; Bomy Chen
We present the structural and electrical characteristics of the latest generation of a self-aligned split-gate NOR memory incorporating a vertical floating-gate channel having 4.5F/sup 2/ area on 110 nm half-pitch rules. With enhanced electric fields for erase and programming, the cell achieves erase time < 1 ms and program time < 10 /spl mu/s at 100nA programming current. These results demonstrate continued scalability of the SuperFlash cell for high-density, high-speed applications.
Archive | 2017
Jeng-Wei Yang; Man-Tang Wu; Chun-Ming Chen; Mandana Tadayoni; Chien-Sheng Su; Nhan Do
Archive | 2016
Man-Tang Wu; Jeng-Wei Yang; Chien-Sheng Su; Chun-Ming Chen; Nhan Do
Archive | 2017
Chien-Sheng Su; Jeng-Wei Yang; Feng Zhou
Archive | 2017
Feng Zhou; Xian Liu; Jeng-Wei Yang; Chien-Sheng Su; Nhan Do
Archive | 2017
Chien-Sheng Su; Jeng-Wei Yang; Man-Tang Wu; Chun-Ming Chen; Hieu Van Tran; Nhan Do
Archive | 2017
Chun-Ming Chen; Man-Tang Wu; Jeng-Wei Yang; Chien-Sheng Su; Nhan Do
Archive | 2017
Chien-Sheng Su; Jeng-Wei Yang; Man-Tang Wu; Chun-Ming Chen; Hieu Van Tran; Nhan Do
Archive | 2016
Chien-Sheng Su; Jeng-Wei Yang; Man-Tang Wu; Chun-Ming Chen; Hieu Van Tran; Nhan Do
Archive | 2016
Jeng-Wei Yang; Man-Tang Wu; Chun-Ming Chen; Mandana Tadayoni; Chien-Sheng Su; Nhan Do
