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Dive into the research topics where Man-Tang Wu is active.

Publication


Featured researches published by Man-Tang Wu.


international memory workshop | 2015

A 55 nm Logic-Process-Compatible, Split-Gate Flash Memory Array Fully Demonstrated at Automotive Temperature with High Access Speed and Reliability

Nhan Do; Latt Tee; Santosh Hariharan; Steven Lemke; Mandana Tadayoni; Will Yang; Man-Tang Wu; Jinho Kim; Yueh-Hsin Chen; Chien-Sheng Su; Vipin Tiwari; Stephen Zhou; Rodger Qian; Ian Yue

In this paper, a Flash macro designed with high-density arrays of split-gate (SG) SuperFlash® cells, compatibly embedded in a 55 nm Low Power (LP) logic process is demonstrated with full functionality and excellent reliability at automotive temperature range. This split-gate Flash memory technology can be seamlessly and universally embedded in multiple logic process platforms, and can continually be scaled to 40 nm and smaller lithographically nodes, without compromising performance and reliability.


Archive | 2015

Split gate non-volatile flash memory cell having metal-enhanced gates and method of making same

Chun-Ming Chen; Man-Tang Wu; Jeng-Wei Yang; Chien-Sheng Su


Archive | 2016

Method Of Forming Self-Aligned Split-Gate Memory Cell Array With Metal Gates And Logic Devices

Jeng-Wei Yang; Chun-Ming Chen; Man-Tang Wu; Feng Zhou; Xian Liu; Chien-Sheng Su; Nhan Do


Archive | 2015

Split-Gate Flash Memory Cell With Improved Scaling Using Enhanced Lateral Control Gate To Floating Gate Coupling

Jeng-Wei Yang; Man-Tang Wu; Chun-Ming Chen; Chien-Sheng Su; Nhan Do


Archive | 2017

Split Gate Non-volatile Memory Cell Having A Floating Gate, Word Line, Erase Gate, And Method Of Manufacturing

Jeng-Wei Yang; Man-Tang Wu; Chun-Ming Chen; Mandana Tadayoni; Chien-Sheng Su; Nhan Do


Archive | 2016

Method Of Forming Split-Gate Memory Cell Array Along With Low And High Voltage Logic Devices

Man-Tang Wu; Jeng-Wei Yang; Chien-Sheng Su; Chun-Ming Chen; Nhan Do


Archive | 2017

Method Of Integrating FINFET CMOS Devices With Embedded Nonvolatile Memory Cells

Chien-Sheng Su; Jeng-Wei Yang; Man-Tang Wu; Chun-Ming Chen; Hieu Van Tran; Nhan Do


Archive | 2017

Method Of Forming Flash Memory With Separate Wordline And Erase Gates

Chun-Ming Chen; Man-Tang Wu; Jeng-Wei Yang; Chien-Sheng Su; Nhan Do


Archive | 2017

Method Of Making Split Gate Non-volatile Memory Cell With 3D FINFET Structure

Chien-Sheng Su; Jeng-Wei Yang; Man-Tang Wu; Chun-Ming Chen; Hieu Van Tran; Nhan Do


Archive | 2016

Integration Of Split Gate Flash Memory Array And Logic Devices

Chung-Ming Chen; Jeng-Wei Yang; Chien-Sheng Su; Man-Tang Wu; Nhan Do

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Nhan Do

Microchip Technology

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Ian Yue

Microchip Technology

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