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Featured researches published by Jin-Hwa Heo.


symposium on vlsi technology | 2002

Void free and low stress shallow trench isolation technology using P-SOG for sub 0.1 /spl mu/m device

Jin-Hwa Heo; Soo-jin Hong; Dong-Ho Ahn; Hyun-Duk Cho; Moon-han Park; K. Fujihara; U-In Chung; Yong-Chul Oh; Joo-Tae Moon

Highly reliable void free shallow trench isolation (VF-STI) technology by employing polysilazane based inorganic spin-on-glass (P-SOG) is developed for sub-0.1 /spl mu/m devices. In order to overcome the difficulties from the gap-filling and accumulated mechanical stress in STI, a P-SOG pillar is introduced at the trench bottom. As a result, the P-SOG pillar, having low stress, improves data retention time and hot carrier immunity in 256 Mbit DRAM by reducing cumulative STI stress. In addition, VF-STI shows an excellent extendibility in terms of gap filling capability even at an aspect ratio of more than 10 without void formation.


european solid state device research conference | 2005

Effects of plasma nitridation on the electrical properties of nitrided oxide gate dielectric for DRAM application

Jin-Hwa Heo; Dong-Chan Kim; Bon-young Koo; Jihyun Kim; Chul-Sung Kim; Young-Jin Noh; Sungkweon Baek; Yu-gyun Shin; U-In Chung; Joo-Tae Moon; Mann-Ho Cho; Kwun-Bum Chung; Dae Won Moon

We reduced the gate tunneling current by seven times and suppressed NBTI using plasma nitridation-induced re-oxidation (PIROX). In plasma nitrided gate oxynitride, the nitrogen concentration at the MOS interface is determined after plasma nitridation process, which affects the electrical and physical properties of gate oxynitride. To facilitate the control of nitrogen concentration at the MOS interface, an additional re-oxidation process is needed, but decreasing the nitrogen concentration. In this paper, the plasma nitridation process is proposed that realizes simultaneously the nitridation and re-oxidation without an additional process and the decrease of nitrogen concentration. The control of nitrogen concentration and the amount of re-oxidation under high pressure process improves the gate tunneling current, mobility, and NBTI.


symposium on vlsi technology | 2003

The P-SOG filling Shallow Trench Isolation technology for sub-70 nm device

Jin-Hwa Heo; Soo-jin Hong; Guk-Hyon Yon; Yu-gyun Shin; K. Fujihara; U-In Chung; Joo-Tae Moon

A novel Polysilazane-based inorganic Spin-On-Glass filling Shallow Trench Isolation (P-SOG filling STI) technology is developed for sub-70 nm devices, for the first time. A key processing step of this P-SOG filling STI technology is annealing after a CMP process. The post-CMP P-SOG annealing eliminates a field oxide recess problem. This technology shows good electrical characteristics compared with a HDP oxide filling STI. The P-SOG filling STI is a promising candidate for the future isolation technology.


Archive | 2001

Method of forming an insulating layer in a trench isolation type semiconductor device

Soo-jin Hong; Moon-han Park; Ju-seon Goo; Jin-Hwa Heo; Hong-Gun Kim; Eunkee Hong


Archive | 2004

Structure of trench isolation and a method of forming the same

Jin-Hwa Heo; Soo-jin Hong


Archive | 2003

Semiconductor device having trench isolation layer and a method of forming the same

Jin-Hwa Heo; Soo-jin Hong


Archive | 2002

Trench device isolation structure and a method of forming the same

Soo-jin Hong; Jin-Hwa Heo


Archive | 2004

Methods of fabricating Fin-field effect transistors (Fin-FETs) having protection layers and devices related thereto

Deok-Hyung Lee; Si-Young Choi; Byeong-Chan Lee; In-Soo Jung; Jin-Hwa Heo


Archive | 2002

Method of forming a trench device isolation structure with upper liner pattern

Soo-jin Hong; Jin-Hwa Heo


Archive | 2003

Trench device isolation structure

Soo-jin Hong; Jin-Hwa Heo

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