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Featured researches published by John A. Iacoponi.


Optical Characterization Techniques for High-Performance Microelectronic Device Manufacturing III | 1996

Combined spectroscopic ellipsometry and reflectometry for advanced semiconductor fabrication metrology

William A. McGahan; Blaine R. Spady; John A. Iacoponi; John D. Williams

Spectroscopic reflectometry has been a mainstay of optical semiconductor metrology for many years, as has single wavelength ellipsometry performed at a fixed angle of incidence. More recently, spectroscopic ellipsometry has been employed to provide film thickness and optical constant measurements with greater precision and accuracy. In this work we demonstrate the combined use of spectroscopic ellipsometry (performed from 420 - 720 nm at 75 degree angle of incidence) and spectroscopic reflectometry (performed from 200 to 800 nm at normal incidence) for the characterization of thin films and multilayer stacks commonly encountered in semiconductor device fabrication. By employing sophisticated parametric dispersion models and simultaneously fitting both the reflectance and ellipsometric spectra, we are able to perform accurate and precise characterization of many structures that cannot be characterized with either technique alone or with combined reflectometry and single wavelength ellipsometry.


IEEE Electron Device Letters | 2007

Novel Approach to Reduce Source/Drain Series and Contact Resistance in High-Performance UTSOI CMOS Devices Using Selective Electrodeless CoWP or CoB Process

James Pan; Anna Topol; Ingrid Shao; Chun-Yung Sung; John A. Iacoponi; Ming-Ren Lin

This letter reports a selective metal deposition process using an electrodeless technique for MOSFETs fabricated in an ultrathin silicon-on-insulator (UTSOI) substrate. A layer of metal (CoWP or CoB) is formed on the source and drain nickel and cobalt silicides without depositing on the dielectric spacers. Leakage current information, which is an indication of selectivity of the process, is presented in this letter. The shortest channel length of the UTSOI NMOSFETs is 20 nm, and the SOI thickness is 10 nm. The data show that excellent selectivity is achieved without increasing the leakage current of the transistors.


Process, equipment, and materials control in integrated circuit manufacturing. Conference | 1998

Chemical rate model for the surface pyrolysis of tetrakis(dimethylamido)titanium to form titanium nitride films

Anthony J. Toprac; John A. Iacoponi; Karl A. Littau

A chemical kinetic rate model for the deposition of titanium nitride films from the surface reaction of tetrakis(dimethyl-amido)titanium (TDMAT) was developed. Without ammonia addition, TDMAT forms a titanium nitride film by pyrolyzing on the hot substrate surface. Experimental data from the applied materials 5000 deposition tool was modeled using a CSTR formulation. With the parameters of the surface reaction model regressed to fit portions of the experimental results, reasonably accurate model predictions over the entire domain of experimental data were obtained.


Archive | 1998

Electroplating uniformity by diffuser design

Christy Mei-Chu Woo; John A. Iacoponi; Kai Yang


Archive | 2000

Backside contact for integrated circuit and method of forming same

John A. Iacoponi; John C. Miethke


Archive | 1996

Deposition of a conductor in a via hole or trench

Paul R. Besser; John A. Iacoponi; Roger L. Alvis


Archive | 1999

Method for forming semiconductor seed layers by inert gas sputter etching

John A. Iacoponi; Dirk Brown; Takeshi Nogami


Archive | 1999

BORDERLESS VIAS WITH CVD BARRIER LAYER

Robert C. Chen; David Greenlaw; John A. Iacoponi


Archive | 2000

Dual barrier and conductor deposition in a dual damascene process for semiconductors

Shekhar Pramanick; Dirk Brown; John A. Iacoponi


Archive | 1999

Semiconductor interconnect interface processing by high pressure deposition

John A. Iacoponi; Dirk Brown; Takeshi Nogami

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Dirk Brown

Advanced Micro Devices

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