John Clayton Foster
Advanced Micro Devices
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Publication
Featured researches published by John Clayton Foster.
symposium on vlsi technology | 2000
Qi Xiang; Christy Mei-Chu Woo; Eric N. Paton; John Clayton Foster; Bin Yu; Ming-Ren Lin
CMOS devices down to 50 nm gate length were fabricated with NiSi salicide for the first time. Edge effects of Ni-polycide formation, enhanced by a recessed spacer, results in gate Rs roll-off with poly line width. Ultra low /spl sim/2 /spl Omega///spl square/ gate Rs is achieved for 50 nm line width with low junction leakage. Source/drain series resistance is significantly reduced and, consequently, drive current is improved with NiSi. Ring oscillator speed measurements showed significant improvement in gate delay with NiSi, especially for the ring oscillators made with large gate width devices.
Archive | 2000
Qi Xiang; Paul R. Besser; Matthew S. Buynoski; John Clayton Foster; Paul L. King; Eric N. Paton
Archive | 2000
Qi Xiang; Ercan Adem; Jacques Bertrand; Paul R. Besser; Matthew S. Buynoski; John Clayton Foster; Paul L. King; George Jonathan Kluth; Minh Van Ngo; Eric N. Paton; Christy Mei-Chu Woo
Archive | 2000
Qi Xiang; Paul R. Besser; Matthew S. Buynoski; John Clayton Foster; Paul L. King; Eric N. Paton
Archive | 2000
Qi Xiang; Paul R. Besser; Matthew S. Buynoski; John Clayton Foster; Paul L. King; Eric N. Paton
Archive | 2002
John Clayton Foster
Archive | 2001
Qi Xiang; Paul R. Besser; Matthew S. Buynoski; John Clayton Foster; Paul L. King; Eric N. Paton
Archive | 2001
Eric N. Paton; Terri Jo Kitson; Jeffrey S. Glick; John Clayton Foster
Archive | 2001
John Clayton Foster; Paul L. King
Archive | 2001
Eric N. Paton; Paul R. Besser; Matthew S. Buynoski; Qi Xiang; Paul L. King; John Clayton Foster