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Dive into the research topics where Jong Myeong Lee is active.

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Featured researches published by Jong Myeong Lee.


international interconnect technology conference | 2004

Characteristics of PAALD-TaN thin films derived from TAIMATA precursor for copper metallization

Jong Won Hong; Kyung In Choi; You Kyoung Lee; Sung Gun Park; Sang Woo Lee; Jong Myeong Lee; Sang Bom Kang; Gil Heyun Choi; Sung-Tae Kim; U-In Chung; Joo Tae Moon

PAALD (plasma assisted atomic layer deposition)-TaN thin films derived from a precursor, tert-amylimidotrisdim-ethylamidotantalum (TAIMATA), for the diffusion barrier in Cu interconnects were developed and compared to the thermal ALD-TaN. The deposition rate of the PAALD-TaN process was around /spl sim/0.9 /spl Aring//cycle at 250 /spl deg/C. The resistivity of TaN film by the PAALD was /spl sim/ 366 /spl mu/ohm-cm, while the resistivity by the thermal ALD was not measurable. The PAALD-TaN and thermal ALD-TaN film appeared to have cubic and amorphous phase, respectively. In Cu metallization, as TaN thickness increased, via resistance with thermal ALD-TaN increased dramatically, but via resistance with PAALD-TaN was almost constant and much lower than that with thermal ALD-TaN. Using PAALD-TaN, the diffusion barrier characteristics was also improved in comparison to thermal ALD-TaN.


international reliability physics symposium | 2011

Formation of highly reliable Cu/low-k interconnects by using CVD Co barrier in dual damascene structures

Hye Kyung Jung; Hyun-Bae Lee; Matsuda Tsukasa; Eun-ji Jung; Jong-Ho Yun; Jong Myeong Lee; Gil-heyun Choi; Si-Young Choi; Chilhee Chung

CVD Co film was investigated as an alternative barrier layer to the conventional PVD TaN\Ta in V1\M2 structure for 32nm node. We improved via filling performance and upstream (V1ƒM2) electromigration (EM) lifetime by more than three times. Excellent step coverage of CVD barrier makes it possible to reduce the thickness of the barrier metal by 30% and to increase the volume of Cu in metal lines. RC delay also reduced with decrease in resistance. Since adhesion at the interface between the barrier-Co and Cu also is strong, migration of Cu atoms is dramatically slowed down. EM in the via is finally deterred due to absence of pre-existing voids, consequently lifetime increases. This CVD Co process is expected to be beneficial for the next technology generation beyond 20nm node.


international reliability physics symposium | 2010

Effect of pre-existing void in sub-30nm Cu interconnect reliability

Zungsun Choi; Matsuda Tsukasa; Jong Myeong Lee; Gil-heyun Choi; Si-Young Choi; Joo-Tae Moon

Pre-existing void effect during electromigration in a sub-30nm wide Cu interconnect was observed. Two types of void are intentionally produced in a single damascene interconnect: 1) A void between Cu and capping dielectric layer (center void) is mainly produced from an excessive overhang by depositing a thick seed layer. 2) A void between Cu and barrier metal (side void) is produced from depositing a thin, discontinuous seed layer. Bi-modality was observed in center voided samples. 44% of lines with center voids show stiff resistance rises at high current density and most of them failed shortly after the resistance rise. No stiff resistance rise was observed at lower current density up to 3000 A.U. In side voided samples, no early failures was observed and the failure show no bimodal trend. Change in local current density around the void is expected to be the major factor for the electromigration performance difference between lines with center and side voids. We were able to show that shape and location of the pre-existing void have a significant effect on the reliability of Cu interconnect, and also the void behavior is highly sensitive to current density.


international interconnect technology conference | 2003

Characteristics of ALD-TaN thin films using a novel precursors for copper metallization

Kyung In Choi; Byung Hee Kim; Sang Woo Lee; Jong Myeong Lee

ALD-TaN thin films derived from tert-buthyIimidotrisdiethyl-amidotantalum (TBTDET) and tert-amylimidotrisdim-ethylamidotantalum (TAIMATA) precursors for the diffusion barrier in Cu interconnects were developed. The deposition rate of the ALD-TaN process was saturated at 0.4 /spl Aring/ /cycle in a temperature range between 200/spl deg/C and 250/spl deg/C with TBTDET and at 0.2 /spl Aring//cycle in a temperature range between 150/spl deg/C and 200/spl deg/C with TAIMATA. Both precursors provided roughly comparable film properties such as not only excellent conformality but also composition and structure characterized by XPS and XRD, respectively. ALD-TaN films obtained from above precursors yield low via resistance in aluminum interconnects. However, relatively high via resistance was resulted upon Cu integration as compared to PVD-TaN and Al metallization. The superior diffusion barrier characteristic on Cu metallization was observed with ALD-TaN by BTS result in comparison to the conventional PVD-TaN.


international reliability physics symposium | 2009

Electromigration tests for critical stress and failure mechanism evaluation in Cu/W via/Al hybrid interconnect

Zungsun Choi; Byung-lyul Park; Jong Myeong Lee; Gil-heyun Choi; Hyeon-deok Lee; Joo-Tae Moon

Electromigration in a hybrid interconnect which consists of copper metallization in via below, aluminum metallization in via above, and tungsten via in between has been investigated. Fatal failures are found to occur in copper segments of the hybrid structures we tested. Two distinct failure mechanisms in copper segments are observed. One type of failure occurs due to void nucleation at the interface between barrier metal of tungsten via and copper. Time to failure is highly dependent on types of barrier metals applied. Critical stresses for void nucleation at the interface for 3 types of barrier metals are obtained using a simulation tool, and the average stress ranges from 61MPa to 246MPa. Second type of failure, which occurs less frequently than the first type, is by void growth and spanning through width and thickness of the line. Failures by void growth occur at a specific time range and failures are independent of barrier metal variation, which suggests that the failure is initiated by a pre-existing void or a defect. Thus, in order to effectively enhance the EM resistance in this hybrid interconnect structure, one should not only optimize the barrier metal, but also minimize pre-existing voids or defects in the line.


Japanese Journal of Applied Physics | 2003

Investigation of the Contact Resistance between Ti/TiN and Ru in Metal-1/Plate Contacts of Ruthenium Insulator Silicon Capacitor

Ju Young Yun; Byung Hee Kim; Jung-Hun Seo; Jong Myeong Lee; Sang Bom Kang; Gil Heyun Choi; U In Chung; Joo Tae Moon

The contact resistance between Ti/TiN and a Ru electrode in metal-1/plate contacts of ruthenium insulator silicon (RIS) capacitor is investigated. When physical vapor deposition (PVD) Ti/TiN was used as a barrier metal for the metal contact process, a high contact resistance of more than 5000 Ω/contact was obtained due to the oxidation of Ti by the residual oxygen in Ru electrode. On the other hand, with a plasma enhanced chemical vapor deposition (PECVD) Ti/CVD TiN barrier metal, oxidation of Ti was not observed and subsequently a low contact resistance of 15 Ω/contact was obtained. The absence of Ti oxidation with PECVD Ti/CVD TiN can be explained by the reduction of oxygen in the Ru electrode due to the H2 plasma environment in the PECVD-Ti process.


international interconnect technology conference | 2001

A noble metallization process using Preferential Metal Deposition (PMD)-aluminum with methylpyrroridine alane (MPA)

Jong Myeong Lee; Byung Hee Kim; Ju Young Yun; Myoung Bum Lee; Gil Heyun Choi; Young Wook Park; Hyun Koock Shin; Sang In Lee; Joo Tae Moon

A noble Al precursor of methylpyrooridine alane (MPA) showed excellent stabilities and lifetime compared to any other Al precursor. The preferential Metal Deposition (PMD)-Al, which used a CVD-Al process with MPA, showed excellent contact fill and electrical properties, which implied that PMD-Al using MPA can be applied to a ULSI DRAM metallization process, such as metal contact and via holes.


international interconnect technology conference | 2005

Evaluation of adhesion and barrier properties for CVD-TaN on dual damascene copper interconnects

Jong Won Hong; Jong Myeong Lee; Kyung In Choi; Youngsu Chung; Sang Woo Lee; Gil Heyun Choi; Sung-Tae Kim; U-In Chung; Tae Moon; Byung-Il Ryu

CVD-TaN thin films derived from a new noble precursor, tert-amylimidotrisdim-ethylamidotantalum (TAIMATA), for the diffusion barrier in Cu interconnects were studied. The effects of CVD-TaN on dual damascene interconnect (DDI) for Cu metallization were investigated on SiOC (k=2.9) dielectrics with 4 K via chains. The via resistances were measured as a function of TaN thickness (10/spl sim/45 /spl Aring/), compared to PVD TaN. Diffusion barrier properties (bias temperature stress) and delamination length (adhesion test) were studied as a function of TaN thickness. Ar and H/sub 2/ post-plasma after CVD-TaN was introduced to improve the properties of the barrier materials. After applying post-plasma, the via resistances and delamination length of CVD-TaN were investigated and compared to those without post-plasma.


international symposium on plasma process-induced damage | 2003

Plasma-induced damage on sub-5 nm gate oxide by PECVD-Ti process

Hee Sook Park; Jong Myeong Lee; Sang Woo Lee; Jung-Hun Seo; Kyoung Mo Koo; Hyo Bum Lee; Jae Hoon Jang; Dong Kyun Park; In-sun Park; Gil Heyun Choi; U In Chung; Joo Tae Moon

Plasma-induced damage by the PECVD-Ti process on the leakage current of sub-5 nm gate oxide was investigated. The plasma conditions during the deposition of PECVD-Ti critically affected characteristics of the gate oxide such as the leakage current and the breakdown voltage. Lowering of plasma power in a deposition step improves the gate oxide properties but cannot clearly reduce all gate oxide failure. According to plasma damage monitoring analysis, a large plasma damage during the plasma ignition step was observed, which indicates that failure of the gate oxide was due to the unbalanced plasma ignition in the deposition step. It is very important to optimize process parameters and to control system conditions to prevent the unbalanced plasma ignition during the PECVD-Ti process.


international interconnect technology conference | 2003

The improved CVD-Al metallization for deep small contact filling using selective wetting process

Jung-Hun Seo; Byung Hee Kim; Jong Myeong Lee; Hee Sook Park; Ju-young Yun; Young Seop Rah; Gil Heyun Choi; U In Chung; Joo-Tae Moon

The new barrier metal structure using selective wetting layer was proposed. This process using physical vapor deposition (PVD) Ti as the controlling layer for conformal chemical vapor deposition (CVD) Al layer shows an excellent filling capability for deep small contact and good electrical properties as well as the remarkable surface morphology, which can be applied for the new metallization process such as metal contacts and via holes filling.

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